iverilog - Icarus Verilog is a verilog compiler and simulator
Website: | http://www.icarus.com/eda/verilog/index.html |
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License: | GPLv2 |
- Description:
Icarus Verilog is a Verilog compiler that generates a variety of engineering formats, including simulation. It strives to be true to the IEEE-1364 standard.
Packages
iverilog-0.9.20091230-5m.mo8.i686 [986 KiB] |
Changelog
by Hiromasa YOSHIMOTO (2011-04-11):
- (0.9.20091230-5m) - rebuild for new GCC 4.6 |