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analyzer.c
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00001 /*
00002  * This file is part of the sigrok project.
00003  *
00004  * Copyright (C) 2010 Sven Peter <sven@fail0verflow.com>
00005  * Copyright (C) 2010 Haxx Enterprises <bushing@gmail.com>
00006  * All rights reserved.
00007  *
00008  * Redistribution and use in source and binary forms, with or
00009  * without modification, are permitted provided that the following
00010  * conditions are met:
00011  *
00012  * * Redistributions of source code must retain the above copyright notice,
00013  *   this list of conditions and the following disclaimer.
00014  *
00015  * * Redistributions in binary form must reproduce the above copyright notice,
00016  *   this list of conditions and the following disclaimer in the documentation
00017  *   and/or other materials provided with the distribution.
00018  *
00019  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00020  *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00021  *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00022  *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
00023  *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
00024  *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
00025  *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00026  *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
00027  *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
00028  *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
00029  *  THE POSSIBILITY OF SUCH DAMAGE.
00030  */
00031 
00032 #include <assert.h>
00033 #include "analyzer.h"
00034 #include "gl_usb.h"
00035 
00036 enum {
00037         HARD_DATA_CHECK_SUM             = 0x00,
00038         PASS_WORD,
00039 
00040         DEV_ID0                         = 0x10,
00041         DEV_ID1,
00042 
00043         START_STATUS                    = 0x20,
00044         DEV_STATUS                      = 0x21,
00045         FREQUENCY_REG0                  = 0x30,
00046         FREQUENCY_REG1,
00047         FREQUENCY_REG2,
00048         FREQUENCY_REG3,
00049         FREQUENCY_REG4,
00050         MEMORY_LENGTH,
00051         CLOCK_SOURCE,
00052 
00053         TRIGGER_STATUS0                 = 0x40,
00054         TRIGGER_STATUS1,
00055         TRIGGER_STATUS2,
00056         TRIGGER_STATUS3,
00057         TRIGGER_STATUS4,
00058         TRIGGER_STATUS5,
00059         TRIGGER_STATUS6,
00060         TRIGGER_STATUS7,
00061         TRIGGER_STATUS8,
00062 
00063         TRIGGER_COUNT0                  = 0x50,
00064         TRIGGER_COUNT1,
00065 
00066         TRIGGER_LEVEL0                  = 0x55,
00067         TRIGGER_LEVEL1,
00068         TRIGGER_LEVEL2,
00069         TRIGGER_LEVEL3,
00070 
00071         RAMSIZE_TRIGGERBAR_ADDRESS0     = 0x60,
00072         RAMSIZE_TRIGGERBAR_ADDRESS1,
00073         RAMSIZE_TRIGGERBAR_ADDRESS2,
00074         TRIGGERBAR_ADDRESS0,
00075         TRIGGERBAR_ADDRESS1,
00076         TRIGGERBAR_ADDRESS2,
00077         DONT_CARE_TRIGGERBAR,
00078 
00079         FILTER_ENABLE                   = 0x70,
00080         FILTER_STATUS,
00081 
00082         ENABLE_DELAY_TIME0              = 0x7a,
00083         ENABLE_DELAY_TIME1,
00084 
00085         ENABLE_INSERT_DATA0             = 0x80,
00086         ENABLE_INSERT_DATA1,
00087         ENABLE_INSERT_DATA2,
00088         ENABLE_INSERT_DATA3,
00089         COMPRESSION_TYPE0,
00090         COMPRESSION_TYPE1,
00091 
00092         TRIGGER_ADDRESS0                = 0x90,
00093         TRIGGER_ADDRESS1,
00094         TRIGGER_ADDRESS2,
00095 
00096         NOW_ADDRESS0                    = 0x96,
00097         NOW_ADDRESS1,
00098         NOW_ADDRESS2,
00099 
00100         STOP_ADDRESS0                   = 0x9b,
00101         STOP_ADDRESS1,
00102         STOP_ADDRESS2,
00103 
00104         READ_RAM_STATUS                 = 0xa0,
00105 };
00106 
00107 static int g_trigger_status[9] = { 0 };
00108 static int g_trigger_count = 1;
00109 static int g_filter_status[8] = { 0 };
00110 static int g_filter_enable = 0;
00111 
00112 static int g_freq_value = 100;
00113 static int g_freq_scale = FREQ_SCALE_MHZ;
00114 static int g_memory_size = MEMORY_SIZE_512K;
00115 static int g_ramsize_triggerbar_addr = 0x80000 >> 2;
00116 static int g_triggerbar_addr = 0x3fe;
00117 static int g_compression = COMPRESSION_NONE;
00118 
00119 /* Maybe unk specifies an "endpoint" or "register" of sorts. */
00120 static int analyzer_write_status(libusb_device_handle *devh, unsigned char unk,
00121                                  unsigned char flags)
00122 {
00123         assert(unk <= 3);
00124         return gl_reg_write(devh, START_STATUS, unk << 6 | flags);
00125 }
00126 
00127 static int __analyzer_set_freq(libusb_device_handle *devh, int freq, int scale)
00128 {
00129         int reg0 = 0, divisor = 0, reg2 = 0;
00130 
00131         switch (scale) {
00132         case FREQ_SCALE_MHZ: /* MHz */
00133                 if (freq >= 100 && freq <= 200) {
00134                         reg0 = freq * 0.1;
00135                         divisor = 1;
00136                         reg2 = 0;
00137                         break;
00138                 }
00139                 if (freq >= 50 && freq < 100) {
00140                         reg0 = freq * 0.2;
00141                         divisor = 2;
00142                         reg2 = 0;
00143                         break;
00144                 }
00145                 if (freq >= 10 && freq < 50) {
00146                         if (freq == 25) {
00147                                 reg0 = 25;
00148                                 divisor = 5;
00149                                 reg2 = 1;
00150                                 break;
00151                         } else {
00152                                 reg0 = freq * 0.5;
00153                                 divisor = 5;
00154                                 reg2 = 1;
00155                                 break;
00156                         }
00157                 }
00158                 if (freq >= 2 && freq < 10) {
00159                         divisor = 5;
00160                         reg0 = freq * 2;
00161                         reg2 = 2;
00162                         break;
00163                 }
00164                 if (freq == 1) {
00165                         divisor = 5;
00166                         reg2 = 16;
00167                         reg0 = 5;
00168                         break;
00169                 }
00170                 divisor = 5;
00171                 reg0 = 5;
00172                 reg2 = 64;
00173                 break;
00174         case FREQ_SCALE_HZ: /* Hz */
00175                 if (freq >= 500 && freq < 1000) {
00176                         reg0 = freq * 0.01;
00177                         divisor = 10;
00178                         reg2 = 64;
00179                         break;
00180                 }
00181                 if (freq >= 300 && freq < 500) {
00182                         reg0 = freq * 0.005 * 8;
00183                         divisor = 5;
00184                         reg2 = 67;
00185                         break;
00186                 }
00187                 if (freq >= 100 && freq < 300) {
00188                         reg0 = freq * 0.005 * 16;
00189                         divisor = 5;
00190                         reg2 = 68;
00191                         break;
00192                 }
00193                 divisor = 5;
00194                 reg0 = 5;
00195                 reg2 = 64;
00196                 break;
00197         case FREQ_SCALE_KHZ: /* kHz */
00198                 if (freq >= 500 && freq < 1000) {
00199                         reg0 = freq * 0.01;
00200                         divisor = 5;
00201                         reg2 = 17;
00202                         break;
00203                 }
00204                 if (freq >= 100 && freq < 500) {
00205                         reg0 = freq * 0.05;
00206                         divisor = 5;
00207                         reg2 = 32;
00208                         break;
00209                 }
00210                 if (freq >= 50 && freq < 100) {
00211                         reg0 = freq * 0.1;
00212                         divisor = 5;
00213                         reg2 = 33;
00214                         break;
00215                 }
00216                 if (freq >= 10 && freq < 50) {
00217                         if (freq == 25) {
00218                                 reg0 = 25;
00219                                 divisor = 5;
00220                                 reg2 = 49;
00221                                 break;
00222                         }
00223                         reg0 = freq * 0.5;
00224                         divisor = 5;
00225                         reg2 = 48;
00226                         break;
00227                 }
00228                 if (freq >= 2 && freq < 10) {
00229                         divisor = 5;
00230                         reg0 = freq * 2;
00231                         reg2 = 50;
00232                         break;
00233                 }
00234                 divisor = 5;
00235                 reg0 = 5;
00236                 reg2 = 64;
00237                 break;
00238         default:
00239                 divisor = 5;
00240                 reg0 = 5;
00241                 reg2 = 64;
00242                 break;
00243         }
00244         if (gl_reg_write(devh, FREQUENCY_REG0, divisor) < 0)
00245                 return -1; /* Divisor maybe? */
00246 
00247         if (gl_reg_write(devh, FREQUENCY_REG1, reg0) < 0)
00248                 return -1; /* 10 / 0.2 */
00249 
00250         if (gl_reg_write(devh, FREQUENCY_REG2, 0x02) < 0)
00251                 return -1; /* Always 2 */
00252 
00253         if (gl_reg_write(devh, FREQUENCY_REG4, reg2) < 0)
00254                 return -1;
00255 
00256         return 0;
00257 }
00258 
00259 static void __analyzer_set_ramsize_trigger_address(libusb_device_handle *devh,
00260                                                    unsigned int address)
00261 {
00262         gl_reg_write(devh, RAMSIZE_TRIGGERBAR_ADDRESS0, (address >> 0) & 0xFF);
00263         gl_reg_write(devh, RAMSIZE_TRIGGERBAR_ADDRESS1, (address >> 8) & 0xFF);
00264         gl_reg_write(devh, RAMSIZE_TRIGGERBAR_ADDRESS2, (address >> 16) & 0xFF);
00265 }
00266 
00267 static void __analyzer_set_triggerbar_address(libusb_device_handle *devh,
00268                                               unsigned int address)
00269 {
00270         gl_reg_write(devh, TRIGGERBAR_ADDRESS0, (address >> 0) & 0xFF);
00271         gl_reg_write(devh, TRIGGERBAR_ADDRESS1, (address >> 8) & 0xFF);
00272         gl_reg_write(devh, TRIGGERBAR_ADDRESS2, (address >> 16) & 0xFF);
00273 }
00274 
00275 static void __analyzer_set_compression(libusb_device_handle *devh,
00276                                        unsigned int type)
00277 {
00278         gl_reg_write(devh, COMPRESSION_TYPE0, (type >> 0) & 0xFF);
00279         gl_reg_write(devh, COMPRESSION_TYPE1, (type >> 8) & 0xFF);
00280 }
00281 
00282 static void __analyzer_set_trigger_count(libusb_device_handle *devh,
00283                                          unsigned int count)
00284 {
00285         gl_reg_write(devh, TRIGGER_COUNT0, (count >> 0) & 0xFF);
00286         gl_reg_write(devh, TRIGGER_COUNT1, (count >> 8) & 0xFF);
00287 }
00288 
00289 static void analyzer_write_enable_insert_data(libusb_device_handle *devh)
00290 {
00291         gl_reg_write(devh, ENABLE_INSERT_DATA0, 0x12);
00292         gl_reg_write(devh, ENABLE_INSERT_DATA1, 0x34);
00293         gl_reg_write(devh, ENABLE_INSERT_DATA2, 0x56);
00294         gl_reg_write(devh, ENABLE_INSERT_DATA3, 0x78);
00295 }
00296 
00297 static void analyzer_set_filter(libusb_device_handle *devh)
00298 {
00299         int i;
00300         gl_reg_write(devh, FILTER_ENABLE, g_filter_enable);
00301         for (i = 0; i < 8; i++)
00302                 gl_reg_write(devh, FILTER_STATUS + i, g_filter_status[i]);
00303 }
00304 
00305 SR_PRIV void analyzer_reset(libusb_device_handle *devh)
00306 {
00307         analyzer_write_status(devh, 3, STATUS_FLAG_NONE);       // reset device
00308         analyzer_write_status(devh, 3, STATUS_FLAG_RESET);      // reset device
00309 }
00310 
00311 SR_PRIV void analyzer_initialize(libusb_device_handle *devh)
00312 {
00313         analyzer_write_status(devh, 1, STATUS_FLAG_NONE);
00314         analyzer_write_status(devh, 1, STATUS_FLAG_INIT);
00315         analyzer_write_status(devh, 1, STATUS_FLAG_NONE);
00316 }
00317 
00318 SR_PRIV void analyzer_wait(libusb_device_handle *devh, int set, int unset)
00319 {
00320         int status;
00321         while (1) {
00322                 status = gl_reg_read(devh, DEV_STATUS);
00323                 if ((status & set) && ((status & unset) == 0))
00324                         return;
00325         }
00326 }
00327 
00328 SR_PRIV void analyzer_read_start(libusb_device_handle *devh)
00329 {
00330         int i;
00331 
00332         analyzer_write_status(devh, 3, STATUS_FLAG_20 | STATUS_FLAG_READ);
00333 
00334         for (i = 0; i < 8; i++)
00335                 (void)gl_reg_read(devh, READ_RAM_STATUS);
00336 }
00337 
00338 SR_PRIV int analyzer_read_data(libusb_device_handle *devh, void *buffer,
00339                        unsigned int size)
00340 {
00341         return gl_read_bulk(devh, buffer, size);
00342 }
00343 
00344 SR_PRIV void analyzer_read_stop(libusb_device_handle *devh)
00345 {
00346         analyzer_write_status(devh, 3, STATUS_FLAG_20);
00347         analyzer_write_status(devh, 3, STATUS_FLAG_NONE);
00348 }
00349 
00350 SR_PRIV void analyzer_start(libusb_device_handle *devh)
00351 {
00352         analyzer_write_status(devh, 1, STATUS_FLAG_NONE);
00353         analyzer_write_status(devh, 1, STATUS_FLAG_INIT);
00354         analyzer_write_status(devh, 1, STATUS_FLAG_NONE);
00355         analyzer_write_status(devh, 1, STATUS_FLAG_GO);
00356 }
00357 
00358 SR_PRIV void analyzer_configure(libusb_device_handle *devh)
00359 {
00360         int i;
00361 
00362         /* Write_Start_Status */
00363         analyzer_write_status(devh, 1, STATUS_FLAG_RESET);
00364         analyzer_write_status(devh, 1, STATUS_FLAG_NONE);
00365 
00366         /* Start_Config_Outside_Device ? */
00367         analyzer_write_status(devh, 1, STATUS_FLAG_INIT);
00368         analyzer_write_status(devh, 1, STATUS_FLAG_NONE);
00369 
00370         /* SetData_To_Frequence_Reg */
00371         __analyzer_set_freq(devh, g_freq_value, g_freq_scale);
00372 
00373         /* SetMemory_Length */
00374         gl_reg_write(devh, MEMORY_LENGTH, g_memory_size);
00375 
00376         /* Sele_Inside_Outside_Clock */
00377         gl_reg_write(devh, CLOCK_SOURCE, 0x03);
00378 
00379         /* Set_Trigger_Status */
00380         for (i = 0; i < 9; i++)
00381                 gl_reg_write(devh, TRIGGER_STATUS0 + i, g_trigger_status[i]);
00382 
00383         __analyzer_set_trigger_count(devh, g_trigger_count);
00384 
00385         /* Set_Trigger_Level */
00386         gl_reg_write(devh, TRIGGER_LEVEL0, 0x31);
00387         gl_reg_write(devh, TRIGGER_LEVEL1, 0x31);
00388         gl_reg_write(devh, TRIGGER_LEVEL2, 0x31);
00389         gl_reg_write(devh, TRIGGER_LEVEL3, 0x31);
00390 
00391         /* Size of actual memory >> 2 */
00392         __analyzer_set_ramsize_trigger_address(devh, g_ramsize_triggerbar_addr);
00393         __analyzer_set_triggerbar_address(devh, g_triggerbar_addr);
00394 
00395         /* Set_Dont_Care_TriggerBar */
00396         gl_reg_write(devh, DONT_CARE_TRIGGERBAR, 0x01);
00397 
00398         /* Enable_Status */
00399         analyzer_set_filter(devh);
00400 
00401         /* Set_Enable_Delay_Time */
00402         gl_reg_write(devh, 0x7a, 0x00);
00403         gl_reg_write(devh, 0x7b, 0x00);
00404         analyzer_write_enable_insert_data(devh);
00405         __analyzer_set_compression(devh, g_compression);
00406 }
00407 
00408 SR_PRIV void analyzer_add_trigger(int channel, int type)
00409 {
00410         int i;
00411 
00412         if ((channel & 0xf) >= 8)
00413                 return;
00414 
00415         if (type == TRIGGER_HIGH || type == TRIGGER_LOW) {
00416                 if (channel & CHANNEL_A)
00417                         i = 0;
00418                 else if (channel & CHANNEL_B)
00419                         i = 2;
00420                 else if (channel & CHANNEL_C)
00421                         i = 4;
00422                 else if (channel & CHANNEL_D)
00423                         i = 6;
00424                 else
00425                         return;
00426                 if ((channel & 0xf) >= 4) {
00427                         i++;
00428                         channel -= 4;
00429                 }
00430                 g_trigger_status[i] |=
00431                     1 << ((2 * channel) + (type == TRIGGER_LOW ? 1 : 0));
00432         } else {
00433                 if (type == TRIGGER_POSEDGE)
00434                         g_trigger_status[8] = 0x40;
00435                 else if (type == TRIGGER_NEGEDGE)
00436                         g_trigger_status[8] = 0x80;
00437                 else
00438                         g_trigger_status[8] = 0xc0;
00439 
00440                 /* FIXME: Just guessed the index; need to verify. */
00441                 if (channel & CHANNEL_B)
00442                         g_trigger_status[8] += 8;
00443                 else if (channel & CHANNEL_C)
00444                         g_trigger_status[8] += 16;
00445                 else if (channel & CHANNEL_D)
00446                         g_trigger_status[8] += 24;
00447                 g_trigger_status[8] += channel % 8;
00448         }
00449 }
00450 
00451 SR_PRIV void analyzer_add_filter(int channel, int type)
00452 {
00453         int i;
00454 
00455         if (type != FILTER_HIGH && type != FILTER_LOW)
00456                 return;
00457         if ((channel & 0xf) >= 8)
00458                 return;
00459 
00460         if (channel & CHANNEL_A)
00461                 i = 0;
00462         else if (channel & CHANNEL_B)
00463                 i = 2;
00464         else if (channel & CHANNEL_C)
00465                 i = 4;
00466         else if (channel & CHANNEL_D)
00467                 i = 6;
00468         else
00469                 return;
00470 
00471         if ((channel & 0xf) >= 4) {
00472                 i++;
00473                 channel -= 4;
00474         }
00475 
00476         g_filter_status[i] |=
00477             1 << ((2 * channel) + (type == FILTER_LOW ? 1 : 0));
00478 
00479         g_filter_enable = 1;
00480 }
00481 
00482 SR_PRIV void analyzer_set_trigger_count(int count)
00483 {
00484         g_trigger_count = count;
00485 }
00486 
00487 SR_PRIV void analyzer_set_freq(int freq, int scale)
00488 {
00489         g_freq_value = freq;
00490         g_freq_scale = scale;
00491 }
00492 
00493 SR_PRIV void analyzer_set_memory_size(unsigned int size)
00494 {
00495         g_memory_size = size;
00496 }
00497 
00498 SR_PRIV void analyzer_set_ramsize_trigger_address(unsigned int address)
00499 {
00500         g_ramsize_triggerbar_addr = address;
00501 }
00502 
00503 SR_PRIV void analyzer_set_triggerbar_address(unsigned int address)
00504 {
00505         g_triggerbar_addr = address;
00506 }
00507 
00508 SR_PRIV unsigned int analyzer_read_id(libusb_device_handle *devh)
00509 {
00510         return gl_reg_read(devh, DEV_ID1) << 8 | gl_reg_read(devh, DEV_ID0);
00511 }
00512 
00513 SR_PRIV unsigned int analyzer_get_stop_address(libusb_device_handle *devh)
00514 {
00515         return gl_reg_read(devh, STOP_ADDRESS2) << 16 | gl_reg_read(devh,
00516                         STOP_ADDRESS1) << 8 | gl_reg_read(devh, STOP_ADDRESS0);
00517 }
00518 
00519 SR_PRIV unsigned int analyzer_get_now_address(libusb_device_handle *devh)
00520 {
00521         return gl_reg_read(devh, NOW_ADDRESS2) << 16 | gl_reg_read(devh,
00522                         NOW_ADDRESS1) << 8 | gl_reg_read(devh, NOW_ADDRESS0);
00523 }
00524 
00525 SR_PRIV unsigned int analyzer_get_trigger_address(libusb_device_handle *devh)
00526 {
00527         return gl_reg_read(devh, TRIGGER_ADDRESS2) << 16 | gl_reg_read(devh,
00528                 TRIGGER_ADDRESS1) << 8 | gl_reg_read(devh, TRIGGER_ADDRESS0);
00529 }
00530 
00531 SR_PRIV void analyzer_set_compression(unsigned int type)
00532 {
00533         g_compression = type;
00534 }
00535 
00536 SR_PRIV void analyzer_wait_button(libusb_device_handle *devh)
00537 {
00538         analyzer_wait(devh, STATUS_BUTTON_PRESSED, 0);
00539 }
00540 
00541 SR_PRIV void analyzer_wait_data(libusb_device_handle *devh)
00542 {
00543         analyzer_wait(devh, STATUS_READY | 8, STATUS_BUSY);
00544 }
00545 
00546 SR_PRIV int analyzer_decompress(void *input, unsigned int input_len,
00547                                 void *output, unsigned int output_len)
00548 {
00549         unsigned char *in = input;
00550         unsigned char *out = output;
00551         unsigned int A, B, C, count;
00552         unsigned int written = 0;
00553 
00554         while (input_len > 0) {
00555                 A = *in++;
00556                 B = *in++;
00557                 C = *in++;
00558                 count = (*in++) + 1;
00559 
00560                 if (count > output_len)
00561                         count = output_len;
00562                 output_len -= count;
00563                 written += count;
00564 
00565                 while (count--) {
00566                         *out++ = A;
00567                         *out++ = B;
00568                         *out++ = C;
00569                         *out++ = 0; /* Channel D */
00570                 }
00571 
00572                 input_len -= 4;
00573                 if (output_len == 0)
00574                         break;
00575         }
00576 
00577         return written;
00578 }
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