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00022 #ifndef LIBSIGROK_HARDWARE_ASIX_SIGMA_ASIX_SIGMA_H
00023 #define LIBSIGROK_HARDWARE_ASIX_SIGMA_ASIX_SIGMA_H
00024
00025 enum sigma_write_register {
00026 WRITE_CLOCK_SELECT = 0,
00027 WRITE_TRIGGER_SELECT0 = 1,
00028 WRITE_TRIGGER_SELECT1 = 2,
00029 WRITE_MODE = 3,
00030 WRITE_MEMROW = 4,
00031 WRITE_POST_TRIGGER = 5,
00032 WRITE_TRIGGER_OPTION = 6,
00033 WRITE_PIN_VIEW = 7,
00034
00035 WRITE_TEST = 15,
00036 };
00037
00038 enum sigma_read_register {
00039 READ_ID = 0,
00040 READ_TRIGGER_POS_LOW = 1,
00041 READ_TRIGGER_POS_HIGH = 2,
00042 READ_TRIGGER_POS_UP = 3,
00043 READ_STOP_POS_LOW = 4,
00044 READ_STOP_POS_HIGH = 5,
00045 READ_STOP_POS_UP = 6,
00046 READ_MODE = 7,
00047 READ_PIN_CHANGE_LOW = 8,
00048 READ_PIN_CHANGE_HIGH = 9,
00049 READ_BLOCK_LAST_TS_LOW = 10,
00050 READ_BLOCK_LAST_TS_HIGH = 11,
00051 READ_PIN_VIEW = 12,
00052
00053 READ_TEST = 15,
00054 };
00055
00056 #define REG_ADDR_LOW (0 << 4)
00057 #define REG_ADDR_HIGH (1 << 4)
00058 #define REG_DATA_LOW (2 << 4)
00059 #define REG_DATA_HIGH_WRITE (3 << 4)
00060 #define REG_READ_ADDR (4 << 4)
00061 #define REG_DRAM_WAIT_ACK (5 << 4)
00062
00063
00064 #define REG_DRAM_BLOCK (6 << 4)
00065 #define REG_DRAM_BLOCK_BEGIN (8 << 4)
00066 #define REG_DRAM_BLOCK_DATA (10 << 4)
00067
00068 #define LEDSEL0 6
00069 #define LEDSEL1 7
00070
00071 #define NEXT_REG 1
00072
00073 #define EVENTS_PER_CLUSTER 7
00074
00075 #define CHUNK_SIZE 1024
00076
00077 struct clockselect_50 {
00078 uint8_t async;
00079 uint8_t fraction;
00080 uint16_t disabled_probes;
00081 };
00082
00083
00084 struct triggerinout {
00085 uint8_t trgout_resistor_enable : 1;
00086 uint8_t trgout_resistor_pullup : 1;
00087 uint8_t reserved1 : 1;
00088 uint8_t trgout_bytrigger : 1;
00089 uint8_t trgout_byevent : 1;
00090 uint8_t trgout_bytriggerin : 1;
00091 uint8_t reserved2 : 2;
00092
00093
00094 uint8_t trgout_resistor_enable2 : 1;
00095 uint8_t trgout_resistor_pullup2 : 1;
00096
00097 uint8_t reserved3 : 1;
00098 uint8_t trgout_long : 1;
00099 uint8_t trgout_pin : 1;
00100 uint8_t trgin_negate : 1;
00101 uint8_t trgout_enable : 1;
00102 uint8_t trgin_enable : 1;
00103 };
00104
00105 struct triggerlut {
00106
00107 uint16_t m0d[4], m1d[4], m2d[4];
00108 uint16_t m3, m3s, m4;
00109
00110
00111 struct {
00112 uint8_t selc : 2;
00113 uint8_t selpresc : 6;
00114
00115 uint8_t selinc : 2;
00116 uint8_t selres : 2;
00117 uint8_t sela : 2;
00118 uint8_t selb : 2;
00119
00120 uint16_t cmpb;
00121 uint16_t cmpa;
00122 } params;
00123 };
00124
00125
00126 struct sigma_trigger {
00127
00128 uint16_t risingmask;
00129 uint16_t fallingmask;
00130
00131
00132 uint16_t simplemask;
00133 uint16_t simplevalue;
00134
00135
00136 };
00137
00138
00139 enum triggerop {
00140 OP_LEVEL = 1,
00141 OP_NOT,
00142 OP_RISE,
00143 OP_FALL,
00144 OP_RISEFALL,
00145 OP_NOTRISE,
00146 OP_NOTFALL,
00147 OP_NOTRISEFALL,
00148 };
00149
00150
00151 enum triggerfunc {
00152 FUNC_AND = 1,
00153 FUNC_NAND,
00154 FUNC_OR,
00155 FUNC_NOR,
00156 FUNC_XOR,
00157 FUNC_NXOR,
00158 };
00159
00160 struct sigma_state {
00161 enum {
00162 SIGMA_UNINITIALIZED = 0,
00163 SIGMA_IDLE,
00164 SIGMA_CAPTURE,
00165 SIGMA_DOWNLOAD,
00166 } state;
00167
00168 uint32_t stoppos, triggerpos;
00169 uint16_t lastts;
00170 uint16_t lastsample;
00171
00172 int triggerchunk;
00173 int chunks_downloaded;
00174 };
00175
00176
00177 struct context {
00178 struct ftdi_context ftdic;
00179 uint64_t cur_samplerate;
00180 uint64_t period_ps;
00181 uint64_t limit_msec;
00182 struct timeval start_tv;
00183 int cur_firmware;
00184 int num_probes;
00185 int samples_per_event;
00186 int capture_ratio;
00187 struct sigma_trigger trigger;
00188 int use_triggers;
00189 struct sigma_state state;
00190 void *session_dev_id;
00191 };
00192
00193 #endif