1#[rustfmt::skip]
4mod generated;
5#[rustfmt::skip]
6#[cfg_attr(not(target_arch = "arm"), stable(feature = "neon_intrinsics", since = "1.59.0"))]
7#[cfg_attr(target_arch = "arm", unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800"))]
8pub use self::generated::*;
9
10use crate::{core_arch::simd::*, hint::unreachable_unchecked, intrinsics::simd::*, mem::transmute};
11#[cfg(test)]
12use stdarch_test::assert_instr;
13
14pub(crate) trait AsUnsigned {
15 type Unsigned;
16 fn as_unsigned(self) -> Self::Unsigned;
17}
18
19pub(crate) trait AsSigned {
20 type Signed;
21 fn as_signed(self) -> Self::Signed;
22}
23
24macro_rules! impl_sign_conversions_neon {
25 ($(($signed:ty, $unsigned:ty))*) => ($(
26 impl AsUnsigned for $signed {
27 type Unsigned = $unsigned;
28
29 #[inline(always)]
30 fn as_unsigned(self) -> $unsigned {
31 unsafe { transmute(self) }
32 }
33 }
34
35 impl AsSigned for $unsigned {
36 type Signed = $signed;
37
38 #[inline(always)]
39 fn as_signed(self) -> $signed {
40 unsafe { transmute(self) }
41 }
42 }
43 )*)
44}
45
46pub(crate) type p8 = u8;
47pub(crate) type p16 = u16;
48pub(crate) type p64 = u64;
49pub(crate) type p128 = u128;
50
51types! {
52 #![cfg_attr(not(target_arch = "arm"), stable(feature = "neon_intrinsics", since = "1.59.0"))]
53 #![cfg_attr(target_arch = "arm", unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800"))]
54
55 pub struct int8x8_t(8 x pub(crate) i8);
57 pub struct uint8x8_t(8 x pub(crate) u8);
59 pub struct poly8x8_t(8 x pub(crate) p8);
61 pub struct int16x4_t(4 x pub(crate) i16);
63 pub struct uint16x4_t(4 x pub(crate) u16);
65 pub struct float16x4_t(4 x pub(crate) f16);
67 pub struct poly16x4_t(4 x pub(crate) p16);
69 pub struct int32x2_t(2 x pub(crate) i32);
71 pub struct uint32x2_t(2 x pub(crate) u32);
73 pub struct float32x2_t(2 x pub(crate) f32);
75 pub struct int64x1_t(1 x pub(crate) i64);
77 pub struct uint64x1_t(1 x pub(crate) u64);
79 pub struct poly64x1_t(1 x pub(crate) p64);
81
82 pub struct int8x16_t(16 x pub(crate) i8);
84 pub struct uint8x16_t(16 x pub(crate) u8);
86 pub struct poly8x16_t(16 x pub(crate) p8);
88 pub struct int16x8_t(8 x pub(crate) i16);
90 pub struct uint16x8_t(8 x pub(crate) u16);
92 pub struct float16x8_t(8 x pub(crate) f16);
94 pub struct poly16x8_t(8 x pub(crate) p16);
96 pub struct int32x4_t(4 x pub(crate) i32);
98 pub struct uint32x4_t(4 x pub(crate) u32);
100 pub struct float32x4_t(4 x pub(crate) f32);
102 pub struct int64x2_t(2 x pub(crate) i64);
104 pub struct uint64x2_t(2 x pub(crate) u64);
106 pub struct poly64x2_t(2 x pub(crate) p64);
108}
109
110#[repr(C)]
112#[derive(Copy, Clone, Debug)]
113#[cfg_attr(
114 not(target_arch = "arm"),
115 stable(feature = "neon_intrinsics", since = "1.59.0")
116)]
117#[cfg_attr(
118 target_arch = "arm",
119 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
120)]
121pub struct int8x8x2_t(pub int8x8_t, pub int8x8_t);
122#[repr(C)]
124#[derive(Copy, Clone, Debug)]
125#[cfg_attr(
126 not(target_arch = "arm"),
127 stable(feature = "neon_intrinsics", since = "1.59.0")
128)]
129#[cfg_attr(
130 target_arch = "arm",
131 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
132)]
133pub struct int8x8x3_t(pub int8x8_t, pub int8x8_t, pub int8x8_t);
134#[repr(C)]
136#[derive(Copy, Clone, Debug)]
137#[cfg_attr(
138 not(target_arch = "arm"),
139 stable(feature = "neon_intrinsics", since = "1.59.0")
140)]
141#[cfg_attr(
142 target_arch = "arm",
143 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
144)]
145pub struct int8x8x4_t(pub int8x8_t, pub int8x8_t, pub int8x8_t, pub int8x8_t);
146
147#[repr(C)]
149#[derive(Copy, Clone, Debug)]
150#[cfg_attr(
151 not(target_arch = "arm"),
152 stable(feature = "neon_intrinsics", since = "1.59.0")
153)]
154#[cfg_attr(
155 target_arch = "arm",
156 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
157)]
158pub struct int8x16x2_t(pub int8x16_t, pub int8x16_t);
159#[repr(C)]
161#[derive(Copy, Clone, Debug)]
162#[cfg_attr(
163 not(target_arch = "arm"),
164 stable(feature = "neon_intrinsics", since = "1.59.0")
165)]
166#[cfg_attr(
167 target_arch = "arm",
168 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
169)]
170pub struct int8x16x3_t(pub int8x16_t, pub int8x16_t, pub int8x16_t);
171#[repr(C)]
173#[derive(Copy, Clone, Debug)]
174#[cfg_attr(
175 not(target_arch = "arm"),
176 stable(feature = "neon_intrinsics", since = "1.59.0")
177)]
178#[cfg_attr(
179 target_arch = "arm",
180 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
181)]
182pub struct int8x16x4_t(pub int8x16_t, pub int8x16_t, pub int8x16_t, pub int8x16_t);
183
184#[repr(C)]
186#[derive(Copy, Clone, Debug)]
187#[cfg_attr(
188 not(target_arch = "arm"),
189 stable(feature = "neon_intrinsics", since = "1.59.0")
190)]
191#[cfg_attr(
192 target_arch = "arm",
193 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
194)]
195pub struct uint8x8x2_t(pub uint8x8_t, pub uint8x8_t);
196#[repr(C)]
198#[derive(Copy, Clone, Debug)]
199#[cfg_attr(
200 not(target_arch = "arm"),
201 stable(feature = "neon_intrinsics", since = "1.59.0")
202)]
203#[cfg_attr(
204 target_arch = "arm",
205 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
206)]
207pub struct uint8x8x3_t(pub uint8x8_t, pub uint8x8_t, pub uint8x8_t);
208#[repr(C)]
210#[derive(Copy, Clone, Debug)]
211#[cfg_attr(
212 not(target_arch = "arm"),
213 stable(feature = "neon_intrinsics", since = "1.59.0")
214)]
215#[cfg_attr(
216 target_arch = "arm",
217 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
218)]
219pub struct uint8x8x4_t(pub uint8x8_t, pub uint8x8_t, pub uint8x8_t, pub uint8x8_t);
220
221#[repr(C)]
223#[derive(Copy, Clone, Debug)]
224#[cfg_attr(
225 not(target_arch = "arm"),
226 stable(feature = "neon_intrinsics", since = "1.59.0")
227)]
228#[cfg_attr(
229 target_arch = "arm",
230 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
231)]
232pub struct uint8x16x2_t(pub uint8x16_t, pub uint8x16_t);
233#[repr(C)]
235#[derive(Copy, Clone, Debug)]
236#[cfg_attr(
237 not(target_arch = "arm"),
238 stable(feature = "neon_intrinsics", since = "1.59.0")
239)]
240#[cfg_attr(
241 target_arch = "arm",
242 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
243)]
244pub struct uint8x16x3_t(pub uint8x16_t, pub uint8x16_t, pub uint8x16_t);
245#[repr(C)]
247#[derive(Copy, Clone, Debug)]
248#[cfg_attr(
249 not(target_arch = "arm"),
250 stable(feature = "neon_intrinsics", since = "1.59.0")
251)]
252#[cfg_attr(
253 target_arch = "arm",
254 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
255)]
256pub struct uint8x16x4_t(
257 pub uint8x16_t,
258 pub uint8x16_t,
259 pub uint8x16_t,
260 pub uint8x16_t,
261);
262
263#[repr(C)]
265#[derive(Copy, Clone, Debug)]
266#[cfg_attr(
267 not(target_arch = "arm"),
268 stable(feature = "neon_intrinsics", since = "1.59.0")
269)]
270#[cfg_attr(
271 target_arch = "arm",
272 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
273)]
274pub struct poly8x8x2_t(pub poly8x8_t, pub poly8x8_t);
275#[repr(C)]
277#[derive(Copy, Clone, Debug)]
278#[cfg_attr(
279 not(target_arch = "arm"),
280 stable(feature = "neon_intrinsics", since = "1.59.0")
281)]
282#[cfg_attr(
283 target_arch = "arm",
284 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
285)]
286pub struct poly8x8x3_t(pub poly8x8_t, pub poly8x8_t, pub poly8x8_t);
287#[repr(C)]
289#[derive(Copy, Clone, Debug)]
290#[cfg_attr(
291 not(target_arch = "arm"),
292 stable(feature = "neon_intrinsics", since = "1.59.0")
293)]
294#[cfg_attr(
295 target_arch = "arm",
296 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
297)]
298pub struct poly8x8x4_t(pub poly8x8_t, pub poly8x8_t, pub poly8x8_t, pub poly8x8_t);
299
300#[repr(C)]
302#[derive(Copy, Clone, Debug)]
303#[cfg_attr(
304 not(target_arch = "arm"),
305 stable(feature = "neon_intrinsics", since = "1.59.0")
306)]
307#[cfg_attr(
308 target_arch = "arm",
309 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
310)]
311pub struct poly8x16x2_t(pub poly8x16_t, pub poly8x16_t);
312#[repr(C)]
314#[derive(Copy, Clone, Debug)]
315#[cfg_attr(
316 not(target_arch = "arm"),
317 stable(feature = "neon_intrinsics", since = "1.59.0")
318)]
319#[cfg_attr(
320 target_arch = "arm",
321 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
322)]
323pub struct poly8x16x3_t(pub poly8x16_t, pub poly8x16_t, pub poly8x16_t);
324#[repr(C)]
326#[derive(Copy, Clone, Debug)]
327#[cfg_attr(
328 not(target_arch = "arm"),
329 stable(feature = "neon_intrinsics", since = "1.59.0")
330)]
331#[cfg_attr(
332 target_arch = "arm",
333 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
334)]
335pub struct poly8x16x4_t(
336 pub poly8x16_t,
337 pub poly8x16_t,
338 pub poly8x16_t,
339 pub poly8x16_t,
340);
341
342#[repr(C)]
344#[derive(Copy, Clone, Debug)]
345#[cfg_attr(
346 not(target_arch = "arm"),
347 stable(feature = "neon_intrinsics", since = "1.59.0")
348)]
349#[cfg_attr(
350 target_arch = "arm",
351 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
352)]
353pub struct int16x4x2_t(pub int16x4_t, pub int16x4_t);
354#[repr(C)]
356#[derive(Copy, Clone, Debug)]
357#[cfg_attr(
358 not(target_arch = "arm"),
359 stable(feature = "neon_intrinsics", since = "1.59.0")
360)]
361#[cfg_attr(
362 target_arch = "arm",
363 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
364)]
365pub struct int16x4x3_t(pub int16x4_t, pub int16x4_t, pub int16x4_t);
366#[repr(C)]
368#[derive(Copy, Clone, Debug)]
369#[cfg_attr(
370 not(target_arch = "arm"),
371 stable(feature = "neon_intrinsics", since = "1.59.0")
372)]
373#[cfg_attr(
374 target_arch = "arm",
375 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
376)]
377pub struct int16x4x4_t(pub int16x4_t, pub int16x4_t, pub int16x4_t, pub int16x4_t);
378
379#[repr(C)]
381#[derive(Copy, Clone, Debug)]
382#[cfg_attr(
383 not(target_arch = "arm"),
384 stable(feature = "neon_intrinsics", since = "1.59.0")
385)]
386#[cfg_attr(
387 target_arch = "arm",
388 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
389)]
390pub struct int16x8x2_t(pub int16x8_t, pub int16x8_t);
391#[repr(C)]
393#[derive(Copy, Clone, Debug)]
394#[cfg_attr(
395 not(target_arch = "arm"),
396 stable(feature = "neon_intrinsics", since = "1.59.0")
397)]
398#[cfg_attr(
399 target_arch = "arm",
400 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
401)]
402pub struct int16x8x3_t(pub int16x8_t, pub int16x8_t, pub int16x8_t);
403#[repr(C)]
405#[derive(Copy, Clone, Debug)]
406#[cfg_attr(
407 not(target_arch = "arm"),
408 stable(feature = "neon_intrinsics", since = "1.59.0")
409)]
410#[cfg_attr(
411 target_arch = "arm",
412 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
413)]
414pub struct int16x8x4_t(pub int16x8_t, pub int16x8_t, pub int16x8_t, pub int16x8_t);
415
416#[repr(C)]
418#[derive(Copy, Clone, Debug)]
419#[cfg_attr(
420 not(target_arch = "arm"),
421 stable(feature = "neon_intrinsics", since = "1.59.0")
422)]
423#[cfg_attr(
424 target_arch = "arm",
425 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
426)]
427pub struct uint16x4x2_t(pub uint16x4_t, pub uint16x4_t);
428#[repr(C)]
430#[derive(Copy, Clone, Debug)]
431#[cfg_attr(
432 not(target_arch = "arm"),
433 stable(feature = "neon_intrinsics", since = "1.59.0")
434)]
435#[cfg_attr(
436 target_arch = "arm",
437 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
438)]
439pub struct uint16x4x3_t(pub uint16x4_t, pub uint16x4_t, pub uint16x4_t);
440#[repr(C)]
442#[derive(Copy, Clone, Debug)]
443#[cfg_attr(
444 not(target_arch = "arm"),
445 stable(feature = "neon_intrinsics", since = "1.59.0")
446)]
447#[cfg_attr(
448 target_arch = "arm",
449 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
450)]
451pub struct uint16x4x4_t(
452 pub uint16x4_t,
453 pub uint16x4_t,
454 pub uint16x4_t,
455 pub uint16x4_t,
456);
457
458#[repr(C)]
460#[derive(Copy, Clone, Debug)]
461#[cfg_attr(
462 not(target_arch = "arm"),
463 stable(feature = "neon_intrinsics", since = "1.59.0")
464)]
465#[cfg_attr(
466 target_arch = "arm",
467 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
468)]
469pub struct uint16x8x2_t(pub uint16x8_t, pub uint16x8_t);
470#[repr(C)]
472#[derive(Copy, Clone, Debug)]
473#[cfg_attr(
474 not(target_arch = "arm"),
475 stable(feature = "neon_intrinsics", since = "1.59.0")
476)]
477#[cfg_attr(
478 target_arch = "arm",
479 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
480)]
481pub struct uint16x8x3_t(pub uint16x8_t, pub uint16x8_t, pub uint16x8_t);
482#[repr(C)]
484#[derive(Copy, Clone, Debug)]
485#[cfg_attr(
486 not(target_arch = "arm"),
487 stable(feature = "neon_intrinsics", since = "1.59.0")
488)]
489#[cfg_attr(
490 target_arch = "arm",
491 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
492)]
493pub struct uint16x8x4_t(
494 pub uint16x8_t,
495 pub uint16x8_t,
496 pub uint16x8_t,
497 pub uint16x8_t,
498);
499
500#[repr(C)]
502#[derive(Copy, Clone, Debug)]
503#[cfg_attr(
504 not(target_arch = "arm"),
505 stable(feature = "neon_intrinsics", since = "1.59.0")
506)]
507#[cfg_attr(
508 target_arch = "arm",
509 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
510)]
511pub struct poly16x4x2_t(pub poly16x4_t, pub poly16x4_t);
512#[repr(C)]
514#[derive(Copy, Clone, Debug)]
515#[cfg_attr(
516 not(target_arch = "arm"),
517 stable(feature = "neon_intrinsics", since = "1.59.0")
518)]
519#[cfg_attr(
520 target_arch = "arm",
521 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
522)]
523pub struct poly16x4x3_t(pub poly16x4_t, pub poly16x4_t, pub poly16x4_t);
524#[repr(C)]
526#[derive(Copy, Clone, Debug)]
527#[cfg_attr(
528 not(target_arch = "arm"),
529 stable(feature = "neon_intrinsics", since = "1.59.0")
530)]
531#[cfg_attr(
532 target_arch = "arm",
533 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
534)]
535pub struct poly16x4x4_t(
536 pub poly16x4_t,
537 pub poly16x4_t,
538 pub poly16x4_t,
539 pub poly16x4_t,
540);
541
542#[repr(C)]
544#[derive(Copy, Clone, Debug)]
545#[cfg_attr(
546 not(target_arch = "arm"),
547 stable(feature = "neon_intrinsics", since = "1.59.0")
548)]
549#[cfg_attr(
550 target_arch = "arm",
551 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
552)]
553pub struct poly16x8x2_t(pub poly16x8_t, pub poly16x8_t);
554#[repr(C)]
556#[derive(Copy, Clone, Debug)]
557#[cfg_attr(
558 not(target_arch = "arm"),
559 stable(feature = "neon_intrinsics", since = "1.59.0")
560)]
561#[cfg_attr(
562 target_arch = "arm",
563 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
564)]
565pub struct poly16x8x3_t(pub poly16x8_t, pub poly16x8_t, pub poly16x8_t);
566#[repr(C)]
568#[derive(Copy, Clone, Debug)]
569#[cfg_attr(
570 not(target_arch = "arm"),
571 stable(feature = "neon_intrinsics", since = "1.59.0")
572)]
573#[cfg_attr(
574 target_arch = "arm",
575 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
576)]
577pub struct poly16x8x4_t(
578 pub poly16x8_t,
579 pub poly16x8_t,
580 pub poly16x8_t,
581 pub poly16x8_t,
582);
583
584#[repr(C)]
586#[derive(Copy, Clone, Debug)]
587#[cfg_attr(
588 not(target_arch = "arm"),
589 stable(feature = "neon_intrinsics", since = "1.59.0")
590)]
591#[cfg_attr(
592 target_arch = "arm",
593 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
594)]
595pub struct int32x2x2_t(pub int32x2_t, pub int32x2_t);
596#[repr(C)]
598#[derive(Copy, Clone, Debug)]
599#[cfg_attr(
600 not(target_arch = "arm"),
601 stable(feature = "neon_intrinsics", since = "1.59.0")
602)]
603#[cfg_attr(
604 target_arch = "arm",
605 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
606)]
607pub struct int32x2x3_t(pub int32x2_t, pub int32x2_t, pub int32x2_t);
608#[repr(C)]
610#[derive(Copy, Clone, Debug)]
611#[cfg_attr(
612 not(target_arch = "arm"),
613 stable(feature = "neon_intrinsics", since = "1.59.0")
614)]
615#[cfg_attr(
616 target_arch = "arm",
617 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
618)]
619pub struct int32x2x4_t(pub int32x2_t, pub int32x2_t, pub int32x2_t, pub int32x2_t);
620
621#[repr(C)]
623#[derive(Copy, Clone, Debug)]
624#[cfg_attr(
625 not(target_arch = "arm"),
626 stable(feature = "neon_intrinsics", since = "1.59.0")
627)]
628#[cfg_attr(
629 target_arch = "arm",
630 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
631)]
632pub struct int32x4x2_t(pub int32x4_t, pub int32x4_t);
633#[repr(C)]
635#[derive(Copy, Clone, Debug)]
636#[cfg_attr(
637 not(target_arch = "arm"),
638 stable(feature = "neon_intrinsics", since = "1.59.0")
639)]
640#[cfg_attr(
641 target_arch = "arm",
642 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
643)]
644pub struct int32x4x3_t(pub int32x4_t, pub int32x4_t, pub int32x4_t);
645#[repr(C)]
647#[derive(Copy, Clone, Debug)]
648#[cfg_attr(
649 not(target_arch = "arm"),
650 stable(feature = "neon_intrinsics", since = "1.59.0")
651)]
652#[cfg_attr(
653 target_arch = "arm",
654 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
655)]
656pub struct int32x4x4_t(pub int32x4_t, pub int32x4_t, pub int32x4_t, pub int32x4_t);
657
658#[repr(C)]
660#[derive(Copy, Clone, Debug)]
661#[cfg_attr(
662 not(target_arch = "arm"),
663 stable(feature = "neon_intrinsics", since = "1.59.0")
664)]
665#[cfg_attr(
666 target_arch = "arm",
667 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
668)]
669pub struct uint32x2x2_t(pub uint32x2_t, pub uint32x2_t);
670#[repr(C)]
672#[derive(Copy, Clone, Debug)]
673#[cfg_attr(
674 not(target_arch = "arm"),
675 stable(feature = "neon_intrinsics", since = "1.59.0")
676)]
677#[cfg_attr(
678 target_arch = "arm",
679 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
680)]
681pub struct uint32x2x3_t(pub uint32x2_t, pub uint32x2_t, pub uint32x2_t);
682#[repr(C)]
684#[derive(Copy, Clone, Debug)]
685#[cfg_attr(
686 not(target_arch = "arm"),
687 stable(feature = "neon_intrinsics", since = "1.59.0")
688)]
689#[cfg_attr(
690 target_arch = "arm",
691 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
692)]
693pub struct uint32x2x4_t(
694 pub uint32x2_t,
695 pub uint32x2_t,
696 pub uint32x2_t,
697 pub uint32x2_t,
698);
699
700#[repr(C)]
702#[derive(Copy, Clone, Debug)]
703#[cfg_attr(
704 not(target_arch = "arm"),
705 stable(feature = "neon_intrinsics", since = "1.59.0")
706)]
707#[cfg_attr(
708 target_arch = "arm",
709 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
710)]
711pub struct uint32x4x2_t(pub uint32x4_t, pub uint32x4_t);
712#[repr(C)]
714#[derive(Copy, Clone, Debug)]
715#[cfg_attr(
716 not(target_arch = "arm"),
717 stable(feature = "neon_intrinsics", since = "1.59.0")
718)]
719#[cfg_attr(
720 target_arch = "arm",
721 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
722)]
723pub struct uint32x4x3_t(pub uint32x4_t, pub uint32x4_t, pub uint32x4_t);
724#[repr(C)]
726#[derive(Copy, Clone, Debug)]
727#[cfg_attr(
728 not(target_arch = "arm"),
729 stable(feature = "neon_intrinsics", since = "1.59.0")
730)]
731#[cfg_attr(
732 target_arch = "arm",
733 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
734)]
735pub struct uint32x4x4_t(
736 pub uint32x4_t,
737 pub uint32x4_t,
738 pub uint32x4_t,
739 pub uint32x4_t,
740);
741
742#[repr(C)]
744#[derive(Copy, Clone, Debug)]
745#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
746pub struct float16x4x2_t(pub float16x4_t, pub float16x4_t);
747
748#[repr(C)]
750#[derive(Copy, Clone, Debug)]
751#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
752pub struct float16x4x3_t(pub float16x4_t, pub float16x4_t, pub float16x4_t);
753
754#[repr(C)]
756#[derive(Copy, Clone, Debug)]
757#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
758pub struct float16x4x4_t(
759 pub float16x4_t,
760 pub float16x4_t,
761 pub float16x4_t,
762 pub float16x4_t,
763);
764
765#[repr(C)]
767#[derive(Copy, Clone, Debug)]
768#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
769pub struct float16x8x2_t(pub float16x8_t, pub float16x8_t);
770
771#[repr(C)]
773#[derive(Copy, Clone, Debug)]
774#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
775
776pub struct float16x8x3_t(pub float16x8_t, pub float16x8_t, pub float16x8_t);
777#[repr(C)]
779#[derive(Copy, Clone, Debug)]
780#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
781pub struct float16x8x4_t(
782 pub float16x8_t,
783 pub float16x8_t,
784 pub float16x8_t,
785 pub float16x8_t,
786);
787
788#[repr(C)]
790#[derive(Copy, Clone, Debug)]
791#[cfg_attr(
792 not(target_arch = "arm"),
793 stable(feature = "neon_intrinsics", since = "1.59.0")
794)]
795#[cfg_attr(
796 target_arch = "arm",
797 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
798)]
799pub struct float32x2x2_t(pub float32x2_t, pub float32x2_t);
800#[repr(C)]
802#[derive(Copy, Clone, Debug)]
803#[cfg_attr(
804 not(target_arch = "arm"),
805 stable(feature = "neon_intrinsics", since = "1.59.0")
806)]
807#[cfg_attr(
808 target_arch = "arm",
809 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
810)]
811pub struct float32x2x3_t(pub float32x2_t, pub float32x2_t, pub float32x2_t);
812#[repr(C)]
814#[derive(Copy, Clone, Debug)]
815#[cfg_attr(
816 not(target_arch = "arm"),
817 stable(feature = "neon_intrinsics", since = "1.59.0")
818)]
819#[cfg_attr(
820 target_arch = "arm",
821 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
822)]
823pub struct float32x2x4_t(
824 pub float32x2_t,
825 pub float32x2_t,
826 pub float32x2_t,
827 pub float32x2_t,
828);
829
830#[repr(C)]
832#[derive(Copy, Clone, Debug)]
833#[cfg_attr(
834 not(target_arch = "arm"),
835 stable(feature = "neon_intrinsics", since = "1.59.0")
836)]
837#[cfg_attr(
838 target_arch = "arm",
839 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
840)]
841pub struct float32x4x2_t(pub float32x4_t, pub float32x4_t);
842#[repr(C)]
844#[derive(Copy, Clone, Debug)]
845#[cfg_attr(
846 not(target_arch = "arm"),
847 stable(feature = "neon_intrinsics", since = "1.59.0")
848)]
849#[cfg_attr(
850 target_arch = "arm",
851 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
852)]
853pub struct float32x4x3_t(pub float32x4_t, pub float32x4_t, pub float32x4_t);
854#[repr(C)]
856#[derive(Copy, Clone, Debug)]
857#[cfg_attr(
858 not(target_arch = "arm"),
859 stable(feature = "neon_intrinsics", since = "1.59.0")
860)]
861#[cfg_attr(
862 target_arch = "arm",
863 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
864)]
865pub struct float32x4x4_t(
866 pub float32x4_t,
867 pub float32x4_t,
868 pub float32x4_t,
869 pub float32x4_t,
870);
871
872#[repr(C)]
874#[derive(Copy, Clone, Debug)]
875#[cfg_attr(
876 not(target_arch = "arm"),
877 stable(feature = "neon_intrinsics", since = "1.59.0")
878)]
879#[cfg_attr(
880 target_arch = "arm",
881 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
882)]
883pub struct int64x1x2_t(pub int64x1_t, pub int64x1_t);
884#[repr(C)]
886#[derive(Copy, Clone, Debug)]
887#[cfg_attr(
888 not(target_arch = "arm"),
889 stable(feature = "neon_intrinsics", since = "1.59.0")
890)]
891#[cfg_attr(
892 target_arch = "arm",
893 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
894)]
895pub struct int64x1x3_t(pub int64x1_t, pub int64x1_t, pub int64x1_t);
896#[repr(C)]
898#[derive(Copy, Clone, Debug)]
899#[cfg_attr(
900 not(target_arch = "arm"),
901 stable(feature = "neon_intrinsics", since = "1.59.0")
902)]
903#[cfg_attr(
904 target_arch = "arm",
905 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
906)]
907pub struct int64x1x4_t(pub int64x1_t, pub int64x1_t, pub int64x1_t, pub int64x1_t);
908
909#[repr(C)]
911#[derive(Copy, Clone, Debug)]
912#[cfg_attr(
913 not(target_arch = "arm"),
914 stable(feature = "neon_intrinsics", since = "1.59.0")
915)]
916#[cfg_attr(
917 target_arch = "arm",
918 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
919)]
920pub struct int64x2x2_t(pub int64x2_t, pub int64x2_t);
921#[repr(C)]
923#[derive(Copy, Clone, Debug)]
924#[cfg_attr(
925 not(target_arch = "arm"),
926 stable(feature = "neon_intrinsics", since = "1.59.0")
927)]
928#[cfg_attr(
929 target_arch = "arm",
930 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
931)]
932pub struct int64x2x3_t(pub int64x2_t, pub int64x2_t, pub int64x2_t);
933#[repr(C)]
935#[derive(Copy, Clone, Debug)]
936#[cfg_attr(
937 not(target_arch = "arm"),
938 stable(feature = "neon_intrinsics", since = "1.59.0")
939)]
940#[cfg_attr(
941 target_arch = "arm",
942 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
943)]
944pub struct int64x2x4_t(pub int64x2_t, pub int64x2_t, pub int64x2_t, pub int64x2_t);
945
946#[repr(C)]
948#[derive(Copy, Clone, Debug)]
949#[cfg_attr(
950 not(target_arch = "arm"),
951 stable(feature = "neon_intrinsics", since = "1.59.0")
952)]
953#[cfg_attr(
954 target_arch = "arm",
955 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
956)]
957pub struct uint64x1x2_t(pub uint64x1_t, pub uint64x1_t);
958#[repr(C)]
960#[derive(Copy, Clone, Debug)]
961#[cfg_attr(
962 not(target_arch = "arm"),
963 stable(feature = "neon_intrinsics", since = "1.59.0")
964)]
965#[cfg_attr(
966 target_arch = "arm",
967 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
968)]
969pub struct uint64x1x3_t(pub uint64x1_t, pub uint64x1_t, pub uint64x1_t);
970#[repr(C)]
972#[derive(Copy, Clone, Debug)]
973#[cfg_attr(
974 not(target_arch = "arm"),
975 stable(feature = "neon_intrinsics", since = "1.59.0")
976)]
977#[cfg_attr(
978 target_arch = "arm",
979 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
980)]
981pub struct uint64x1x4_t(
982 pub uint64x1_t,
983 pub uint64x1_t,
984 pub uint64x1_t,
985 pub uint64x1_t,
986);
987
988#[repr(C)]
990#[derive(Copy, Clone, Debug)]
991#[cfg_attr(
992 not(target_arch = "arm"),
993 stable(feature = "neon_intrinsics", since = "1.59.0")
994)]
995#[cfg_attr(
996 target_arch = "arm",
997 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
998)]
999pub struct uint64x2x2_t(pub uint64x2_t, pub uint64x2_t);
1000#[repr(C)]
1002#[derive(Copy, Clone, Debug)]
1003#[cfg_attr(
1004 not(target_arch = "arm"),
1005 stable(feature = "neon_intrinsics", since = "1.59.0")
1006)]
1007#[cfg_attr(
1008 target_arch = "arm",
1009 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1010)]
1011pub struct uint64x2x3_t(pub uint64x2_t, pub uint64x2_t, pub uint64x2_t);
1012#[repr(C)]
1014#[derive(Copy, Clone, Debug)]
1015#[cfg_attr(
1016 not(target_arch = "arm"),
1017 stable(feature = "neon_intrinsics", since = "1.59.0")
1018)]
1019#[cfg_attr(
1020 target_arch = "arm",
1021 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1022)]
1023pub struct uint64x2x4_t(
1024 pub uint64x2_t,
1025 pub uint64x2_t,
1026 pub uint64x2_t,
1027 pub uint64x2_t,
1028);
1029
1030#[repr(C)]
1032#[derive(Copy, Clone, Debug)]
1033#[cfg_attr(
1034 not(target_arch = "arm"),
1035 stable(feature = "neon_intrinsics", since = "1.59.0")
1036)]
1037#[cfg_attr(
1038 target_arch = "arm",
1039 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1040)]
1041pub struct poly64x1x2_t(pub poly64x1_t, pub poly64x1_t);
1042#[repr(C)]
1044#[derive(Copy, Clone, Debug)]
1045#[cfg_attr(
1046 not(target_arch = "arm"),
1047 stable(feature = "neon_intrinsics", since = "1.59.0")
1048)]
1049#[cfg_attr(
1050 target_arch = "arm",
1051 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1052)]
1053pub struct poly64x1x3_t(pub poly64x1_t, pub poly64x1_t, pub poly64x1_t);
1054#[repr(C)]
1056#[derive(Copy, Clone, Debug)]
1057#[cfg_attr(
1058 not(target_arch = "arm"),
1059 stable(feature = "neon_intrinsics", since = "1.59.0")
1060)]
1061#[cfg_attr(
1062 target_arch = "arm",
1063 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1064)]
1065pub struct poly64x1x4_t(
1066 pub poly64x1_t,
1067 pub poly64x1_t,
1068 pub poly64x1_t,
1069 pub poly64x1_t,
1070);
1071
1072#[repr(C)]
1074#[derive(Copy, Clone, Debug)]
1075#[cfg_attr(
1076 not(target_arch = "arm"),
1077 stable(feature = "neon_intrinsics", since = "1.59.0")
1078)]
1079#[cfg_attr(
1080 target_arch = "arm",
1081 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1082)]
1083pub struct poly64x2x2_t(pub poly64x2_t, pub poly64x2_t);
1084#[repr(C)]
1086#[derive(Copy, Clone, Debug)]
1087#[cfg_attr(
1088 not(target_arch = "arm"),
1089 stable(feature = "neon_intrinsics", since = "1.59.0")
1090)]
1091#[cfg_attr(
1092 target_arch = "arm",
1093 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1094)]
1095pub struct poly64x2x3_t(pub poly64x2_t, pub poly64x2_t, pub poly64x2_t);
1096#[repr(C)]
1098#[derive(Copy, Clone, Debug)]
1099#[cfg_attr(
1100 not(target_arch = "arm"),
1101 stable(feature = "neon_intrinsics", since = "1.59.0")
1102)]
1103#[cfg_attr(
1104 target_arch = "arm",
1105 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1106)]
1107pub struct poly64x2x4_t(
1108 pub poly64x2_t,
1109 pub poly64x2_t,
1110 pub poly64x2_t,
1111 pub poly64x2_t,
1112);
1113
1114impl_sign_conversions_neon! {
1115 (i8, u8)
1116 (i16, u16)
1117 (i32, u32)
1118 (i64, u64)
1119 (*const i8, *const u8)
1120 (*const i16, *const u16)
1121 (*const i32, *const u32)
1122 (*const i64, *const u64)
1123 (*mut i8, *mut u8)
1124 (*mut i16, *mut u16)
1125 (*mut i32, *mut u32)
1126 (*mut i64, *mut u64)
1127 (int16x4_t, uint16x4_t)
1128 (int16x8_t, uint16x8_t)
1129 (int32x2_t, uint32x2_t)
1130 (int32x4_t, uint32x4_t)
1131 (int64x1_t, uint64x1_t)
1132 (int64x2_t, uint64x2_t)
1133 (int8x16_t, uint8x16_t)
1134 (int8x8_t, uint8x8_t)
1135 (uint16x4_t, int16x4_t)
1136 (uint16x8_t, int16x8_t)
1137 (uint32x2_t, int32x2_t)
1138 (uint32x4_t, int32x4_t)
1139 (uint64x1_t, int64x1_t)
1140 (uint64x2_t, int64x2_t)
1141 (uint8x16_t, int8x16_t)
1142 (uint8x8_t, int8x8_t)
1143 (int16x4x2_t, uint16x4x2_t)
1144 (int16x4x3_t, uint16x4x3_t)
1145 (int16x4x4_t, uint16x4x4_t)
1146 (int16x8x2_t, uint16x8x2_t)
1147 (int16x8x3_t, uint16x8x3_t)
1148 (int16x8x4_t, uint16x8x4_t)
1149 (int32x2x2_t, uint32x2x2_t)
1150 (int32x2x3_t, uint32x2x3_t)
1151 (int32x2x4_t, uint32x2x4_t)
1152 (int32x4x2_t, uint32x4x2_t)
1153 (int32x4x3_t, uint32x4x3_t)
1154 (int32x4x4_t, uint32x4x4_t)
1155 (int64x1x2_t, uint64x1x2_t)
1156 (int64x1x3_t, uint64x1x3_t)
1157 (int64x1x4_t, uint64x1x4_t)
1158 (int64x2x2_t, uint64x2x2_t)
1159 (int64x2x3_t, uint64x2x3_t)
1160 (int64x2x4_t, uint64x2x4_t)
1161 (int8x16x2_t, uint8x16x2_t)
1162 (int8x16x3_t, uint8x16x3_t)
1163 (int8x16x4_t, uint8x16x4_t)
1164 (int8x8x2_t, uint8x8x2_t)
1165 (int8x8x3_t, uint8x8x3_t)
1166 (int8x8x4_t, uint8x8x4_t)
1167 (uint16x4x2_t, int16x4x2_t)
1168 (uint16x4x3_t, int16x4x3_t)
1169 (uint16x4x4_t, int16x4x4_t)
1170 (uint16x8x2_t, int16x8x2_t)
1171 (uint16x8x3_t, int16x8x3_t)
1172 (uint16x8x4_t, int16x8x4_t)
1173 (uint32x2x2_t, int32x2x2_t)
1174 (uint32x2x3_t, int32x2x3_t)
1175 (uint32x2x4_t, int32x2x4_t)
1176 (uint32x4x2_t, int32x4x2_t)
1177 (uint32x4x3_t, int32x4x3_t)
1178 (uint32x4x4_t, int32x4x4_t)
1179 (uint64x1x2_t, int64x1x2_t)
1180 (uint64x1x3_t, int64x1x3_t)
1181 (uint64x1x4_t, int64x1x4_t)
1182 (uint64x2x2_t, int64x2x2_t)
1183 (uint64x2x3_t, int64x2x3_t)
1184 (uint64x2x4_t, int64x2x4_t)
1185 (uint8x16x2_t, int8x16x2_t)
1186 (uint8x16x3_t, int8x16x3_t)
1187 (uint8x16x4_t, int8x16x4_t)
1188 (uint8x8x2_t, int8x8x2_t)
1189 (uint8x8x3_t, int8x8x3_t)
1190 (uint8x8x4_t, int8x8x4_t)
1191}
1192
1193#[inline]
1195#[target_feature(enable = "neon")]
1196#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1197#[rustc_legacy_const_generics(2)]
1198#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.8", LANE = 7))]
1199#[cfg_attr(
1200 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1201 assert_instr(ld1, LANE = 7)
1202)]
1203#[cfg_attr(
1204 not(target_arch = "arm"),
1205 stable(feature = "neon_intrinsics", since = "1.59.0")
1206)]
1207#[cfg_attr(
1208 target_arch = "arm",
1209 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1210)]
1211pub unsafe fn vld1_lane_s8<const LANE: i32>(ptr: *const i8, src: int8x8_t) -> int8x8_t {
1212 static_assert_uimm_bits!(LANE, 3);
1213 simd_insert!(src, LANE as u32, *ptr)
1214}
1215
1216#[inline]
1218#[target_feature(enable = "neon")]
1219#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1220#[rustc_legacy_const_generics(2)]
1221#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.8", LANE = 15))]
1222#[cfg_attr(
1223 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1224 assert_instr(ld1, LANE = 15)
1225)]
1226#[cfg_attr(
1227 not(target_arch = "arm"),
1228 stable(feature = "neon_intrinsics", since = "1.59.0")
1229)]
1230#[cfg_attr(
1231 target_arch = "arm",
1232 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1233)]
1234pub unsafe fn vld1q_lane_s8<const LANE: i32>(ptr: *const i8, src: int8x16_t) -> int8x16_t {
1235 static_assert_uimm_bits!(LANE, 4);
1236 simd_insert!(src, LANE as u32, *ptr)
1237}
1238
1239#[inline]
1241#[target_feature(enable = "neon")]
1242#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1243#[rustc_legacy_const_generics(2)]
1244#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.16", LANE = 3))]
1245#[cfg_attr(
1246 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1247 assert_instr(ld1, LANE = 3)
1248)]
1249#[cfg_attr(
1250 not(target_arch = "arm"),
1251 stable(feature = "neon_intrinsics", since = "1.59.0")
1252)]
1253#[cfg_attr(
1254 target_arch = "arm",
1255 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1256)]
1257pub unsafe fn vld1_lane_s16<const LANE: i32>(ptr: *const i16, src: int16x4_t) -> int16x4_t {
1258 static_assert_uimm_bits!(LANE, 2);
1259 simd_insert!(src, LANE as u32, *ptr)
1260}
1261
1262#[inline]
1264#[target_feature(enable = "neon")]
1265#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1266#[rustc_legacy_const_generics(2)]
1267#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.16", LANE = 7))]
1268#[cfg_attr(
1269 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1270 assert_instr(ld1, LANE = 7)
1271)]
1272#[cfg_attr(
1273 not(target_arch = "arm"),
1274 stable(feature = "neon_intrinsics", since = "1.59.0")
1275)]
1276#[cfg_attr(
1277 target_arch = "arm",
1278 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1279)]
1280pub unsafe fn vld1q_lane_s16<const LANE: i32>(ptr: *const i16, src: int16x8_t) -> int16x8_t {
1281 static_assert_uimm_bits!(LANE, 3);
1282 simd_insert!(src, LANE as u32, *ptr)
1283}
1284
1285#[inline]
1287#[target_feature(enable = "neon")]
1288#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1289#[rustc_legacy_const_generics(2)]
1290#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.32", LANE = 1))]
1291#[cfg_attr(
1292 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1293 assert_instr(ld1, LANE = 1)
1294)]
1295#[cfg_attr(
1296 not(target_arch = "arm"),
1297 stable(feature = "neon_intrinsics", since = "1.59.0")
1298)]
1299#[cfg_attr(
1300 target_arch = "arm",
1301 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1302)]
1303pub unsafe fn vld1_lane_s32<const LANE: i32>(ptr: *const i32, src: int32x2_t) -> int32x2_t {
1304 static_assert_uimm_bits!(LANE, 1);
1305 simd_insert!(src, LANE as u32, *ptr)
1306}
1307
1308#[inline]
1310#[target_feature(enable = "neon")]
1311#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1312#[rustc_legacy_const_generics(2)]
1313#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.32", LANE = 3))]
1314#[cfg_attr(
1315 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1316 assert_instr(ld1, LANE = 3)
1317)]
1318#[cfg_attr(
1319 not(target_arch = "arm"),
1320 stable(feature = "neon_intrinsics", since = "1.59.0")
1321)]
1322#[cfg_attr(
1323 target_arch = "arm",
1324 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1325)]
1326pub unsafe fn vld1q_lane_s32<const LANE: i32>(ptr: *const i32, src: int32x4_t) -> int32x4_t {
1327 static_assert_uimm_bits!(LANE, 2);
1328 simd_insert!(src, LANE as u32, *ptr)
1329}
1330
1331#[inline]
1333#[target_feature(enable = "neon")]
1334#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1335#[rustc_legacy_const_generics(2)]
1336#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vldr", LANE = 0))]
1337#[cfg_attr(
1338 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1339 assert_instr(ldr, LANE = 0)
1340)]
1341#[cfg_attr(
1342 not(target_arch = "arm"),
1343 stable(feature = "neon_intrinsics", since = "1.59.0")
1344)]
1345#[cfg_attr(
1346 target_arch = "arm",
1347 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1348)]
1349pub unsafe fn vld1_lane_s64<const LANE: i32>(ptr: *const i64, src: int64x1_t) -> int64x1_t {
1350 static_assert!(LANE == 0);
1351 simd_insert!(src, LANE as u32, *ptr)
1352}
1353
1354#[inline]
1356#[target_feature(enable = "neon")]
1357#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1358#[rustc_legacy_const_generics(2)]
1359#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vldr", LANE = 1))]
1360#[cfg_attr(
1361 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1362 assert_instr(ld1, LANE = 1)
1363)]
1364#[cfg_attr(
1365 not(target_arch = "arm"),
1366 stable(feature = "neon_intrinsics", since = "1.59.0")
1367)]
1368#[cfg_attr(
1369 target_arch = "arm",
1370 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1371)]
1372pub unsafe fn vld1q_lane_s64<const LANE: i32>(ptr: *const i64, src: int64x2_t) -> int64x2_t {
1373 static_assert_uimm_bits!(LANE, 1);
1374 simd_insert!(src, LANE as u32, *ptr)
1375}
1376
1377#[inline]
1379#[target_feature(enable = "neon")]
1380#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1381#[rustc_legacy_const_generics(2)]
1382#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.8", LANE = 7))]
1383#[cfg_attr(
1384 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1385 assert_instr(ld1, LANE = 7)
1386)]
1387#[cfg_attr(
1388 not(target_arch = "arm"),
1389 stable(feature = "neon_intrinsics", since = "1.59.0")
1390)]
1391#[cfg_attr(
1392 target_arch = "arm",
1393 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1394)]
1395pub unsafe fn vld1_lane_u8<const LANE: i32>(ptr: *const u8, src: uint8x8_t) -> uint8x8_t {
1396 static_assert_uimm_bits!(LANE, 3);
1397 simd_insert!(src, LANE as u32, *ptr)
1398}
1399
1400#[inline]
1402#[target_feature(enable = "neon")]
1403#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1404#[rustc_legacy_const_generics(2)]
1405#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.8", LANE = 15))]
1406#[cfg_attr(
1407 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1408 assert_instr(ld1, LANE = 15)
1409)]
1410#[cfg_attr(
1411 not(target_arch = "arm"),
1412 stable(feature = "neon_intrinsics", since = "1.59.0")
1413)]
1414#[cfg_attr(
1415 target_arch = "arm",
1416 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1417)]
1418pub unsafe fn vld1q_lane_u8<const LANE: i32>(ptr: *const u8, src: uint8x16_t) -> uint8x16_t {
1419 static_assert_uimm_bits!(LANE, 4);
1420 simd_insert!(src, LANE as u32, *ptr)
1421}
1422
1423#[inline]
1425#[target_feature(enable = "neon")]
1426#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1427#[rustc_legacy_const_generics(2)]
1428#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.16", LANE = 3))]
1429#[cfg_attr(
1430 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1431 assert_instr(ld1, LANE = 3)
1432)]
1433#[cfg_attr(
1434 not(target_arch = "arm"),
1435 stable(feature = "neon_intrinsics", since = "1.59.0")
1436)]
1437#[cfg_attr(
1438 target_arch = "arm",
1439 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1440)]
1441pub unsafe fn vld1_lane_u16<const LANE: i32>(ptr: *const u16, src: uint16x4_t) -> uint16x4_t {
1442 static_assert_uimm_bits!(LANE, 2);
1443 simd_insert!(src, LANE as u32, *ptr)
1444}
1445
1446#[inline]
1448#[target_feature(enable = "neon")]
1449#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1450#[rustc_legacy_const_generics(2)]
1451#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.16", LANE = 7))]
1452#[cfg_attr(
1453 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1454 assert_instr(ld1, LANE = 7)
1455)]
1456#[cfg_attr(
1457 not(target_arch = "arm"),
1458 stable(feature = "neon_intrinsics", since = "1.59.0")
1459)]
1460#[cfg_attr(
1461 target_arch = "arm",
1462 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1463)]
1464pub unsafe fn vld1q_lane_u16<const LANE: i32>(ptr: *const u16, src: uint16x8_t) -> uint16x8_t {
1465 static_assert_uimm_bits!(LANE, 3);
1466 simd_insert!(src, LANE as u32, *ptr)
1467}
1468
1469#[inline]
1471#[target_feature(enable = "neon")]
1472#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1473#[rustc_legacy_const_generics(2)]
1474#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.32", LANE = 1))]
1475#[cfg_attr(
1476 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1477 assert_instr(ld1, LANE = 1)
1478)]
1479#[cfg_attr(
1480 not(target_arch = "arm"),
1481 stable(feature = "neon_intrinsics", since = "1.59.0")
1482)]
1483#[cfg_attr(
1484 target_arch = "arm",
1485 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1486)]
1487pub unsafe fn vld1_lane_u32<const LANE: i32>(ptr: *const u32, src: uint32x2_t) -> uint32x2_t {
1488 static_assert_uimm_bits!(LANE, 1);
1489 simd_insert!(src, LANE as u32, *ptr)
1490}
1491
1492#[inline]
1494#[target_feature(enable = "neon")]
1495#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1496#[rustc_legacy_const_generics(2)]
1497#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.32", LANE = 3))]
1498#[cfg_attr(
1499 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1500 assert_instr(ld1, LANE = 3)
1501)]
1502#[cfg_attr(
1503 not(target_arch = "arm"),
1504 stable(feature = "neon_intrinsics", since = "1.59.0")
1505)]
1506#[cfg_attr(
1507 target_arch = "arm",
1508 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1509)]
1510pub unsafe fn vld1q_lane_u32<const LANE: i32>(ptr: *const u32, src: uint32x4_t) -> uint32x4_t {
1511 static_assert_uimm_bits!(LANE, 2);
1512 simd_insert!(src, LANE as u32, *ptr)
1513}
1514
1515#[inline]
1517#[target_feature(enable = "neon")]
1518#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1519#[rustc_legacy_const_generics(2)]
1520#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vldr", LANE = 0))]
1521#[cfg_attr(
1522 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1523 assert_instr(ldr, LANE = 0)
1524)]
1525#[cfg_attr(
1526 not(target_arch = "arm"),
1527 stable(feature = "neon_intrinsics", since = "1.59.0")
1528)]
1529#[cfg_attr(
1530 target_arch = "arm",
1531 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1532)]
1533pub unsafe fn vld1_lane_u64<const LANE: i32>(ptr: *const u64, src: uint64x1_t) -> uint64x1_t {
1534 static_assert!(LANE == 0);
1535 simd_insert!(src, LANE as u32, *ptr)
1536}
1537
1538#[inline]
1540#[target_feature(enable = "neon")]
1541#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1542#[rustc_legacy_const_generics(2)]
1543#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vldr", LANE = 1))]
1544#[cfg_attr(
1545 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1546 assert_instr(ld1, LANE = 1)
1547)]
1548#[cfg_attr(
1549 not(target_arch = "arm"),
1550 stable(feature = "neon_intrinsics", since = "1.59.0")
1551)]
1552#[cfg_attr(
1553 target_arch = "arm",
1554 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1555)]
1556pub unsafe fn vld1q_lane_u64<const LANE: i32>(ptr: *const u64, src: uint64x2_t) -> uint64x2_t {
1557 static_assert_uimm_bits!(LANE, 1);
1558 simd_insert!(src, LANE as u32, *ptr)
1559}
1560
1561#[inline]
1563#[target_feature(enable = "neon")]
1564#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1565#[rustc_legacy_const_generics(2)]
1566#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.8", LANE = 7))]
1567#[cfg_attr(
1568 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1569 assert_instr(ld1, LANE = 7)
1570)]
1571#[cfg_attr(
1572 not(target_arch = "arm"),
1573 stable(feature = "neon_intrinsics", since = "1.59.0")
1574)]
1575#[cfg_attr(
1576 target_arch = "arm",
1577 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1578)]
1579pub unsafe fn vld1_lane_p8<const LANE: i32>(ptr: *const p8, src: poly8x8_t) -> poly8x8_t {
1580 static_assert_uimm_bits!(LANE, 3);
1581 simd_insert!(src, LANE as u32, *ptr)
1582}
1583
1584#[inline]
1586#[target_feature(enable = "neon")]
1587#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1588#[rustc_legacy_const_generics(2)]
1589#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.8", LANE = 15))]
1590#[cfg_attr(
1591 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1592 assert_instr(ld1, LANE = 15)
1593)]
1594#[cfg_attr(
1595 not(target_arch = "arm"),
1596 stable(feature = "neon_intrinsics", since = "1.59.0")
1597)]
1598#[cfg_attr(
1599 target_arch = "arm",
1600 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1601)]
1602pub unsafe fn vld1q_lane_p8<const LANE: i32>(ptr: *const p8, src: poly8x16_t) -> poly8x16_t {
1603 static_assert_uimm_bits!(LANE, 4);
1604 simd_insert!(src, LANE as u32, *ptr)
1605}
1606
1607#[inline]
1609#[target_feature(enable = "neon")]
1610#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1611#[rustc_legacy_const_generics(2)]
1612#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.16", LANE = 3))]
1613#[cfg_attr(
1614 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1615 assert_instr(ld1, LANE = 3)
1616)]
1617#[cfg_attr(
1618 not(target_arch = "arm"),
1619 stable(feature = "neon_intrinsics", since = "1.59.0")
1620)]
1621#[cfg_attr(
1622 target_arch = "arm",
1623 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1624)]
1625pub unsafe fn vld1_lane_p16<const LANE: i32>(ptr: *const p16, src: poly16x4_t) -> poly16x4_t {
1626 static_assert_uimm_bits!(LANE, 2);
1627 simd_insert!(src, LANE as u32, *ptr)
1628}
1629
1630#[inline]
1632#[target_feature(enable = "neon")]
1633#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1634#[rustc_legacy_const_generics(2)]
1635#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.16", LANE = 7))]
1636#[cfg_attr(
1637 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1638 assert_instr(ld1, LANE = 7)
1639)]
1640#[cfg_attr(
1641 not(target_arch = "arm"),
1642 stable(feature = "neon_intrinsics", since = "1.59.0")
1643)]
1644#[cfg_attr(
1645 target_arch = "arm",
1646 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1647)]
1648pub unsafe fn vld1q_lane_p16<const LANE: i32>(ptr: *const p16, src: poly16x8_t) -> poly16x8_t {
1649 static_assert_uimm_bits!(LANE, 3);
1650 simd_insert!(src, LANE as u32, *ptr)
1651}
1652
1653#[inline]
1657#[target_feature(enable = "neon,aes")]
1658#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1659#[rustc_legacy_const_generics(2)]
1660#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vldr", LANE = 0))]
1661#[cfg_attr(
1662 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1663 assert_instr(ldr, LANE = 0)
1664)]
1665#[cfg_attr(
1666 not(target_arch = "arm"),
1667 stable(feature = "neon_intrinsics", since = "1.59.0")
1668)]
1669#[cfg_attr(
1670 target_arch = "arm",
1671 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1672)]
1673pub unsafe fn vld1_lane_p64<const LANE: i32>(ptr: *const p64, src: poly64x1_t) -> poly64x1_t {
1674 static_assert!(LANE == 0);
1675 simd_insert!(src, LANE as u32, *ptr)
1676}
1677
1678#[inline]
1682#[target_feature(enable = "neon,aes")]
1683#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1684#[rustc_legacy_const_generics(2)]
1685#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vldr", LANE = 1))]
1686#[cfg_attr(
1687 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1688 assert_instr(ld1, LANE = 1)
1689)]
1690#[cfg_attr(
1691 not(target_arch = "arm"),
1692 stable(feature = "neon_intrinsics", since = "1.59.0")
1693)]
1694#[cfg_attr(
1695 target_arch = "arm",
1696 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1697)]
1698pub unsafe fn vld1q_lane_p64<const LANE: i32>(ptr: *const p64, src: poly64x2_t) -> poly64x2_t {
1699 static_assert_uimm_bits!(LANE, 1);
1700 simd_insert!(src, LANE as u32, *ptr)
1701}
1702
1703#[inline]
1705#[target_feature(enable = "neon")]
1706#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1707#[rustc_legacy_const_generics(2)]
1708#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.32", LANE = 1))]
1709#[cfg_attr(
1710 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1711 assert_instr(ld1, LANE = 1)
1712)]
1713#[cfg_attr(
1714 not(target_arch = "arm"),
1715 stable(feature = "neon_intrinsics", since = "1.59.0")
1716)]
1717#[cfg_attr(
1718 target_arch = "arm",
1719 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1720)]
1721pub unsafe fn vld1_lane_f32<const LANE: i32>(ptr: *const f32, src: float32x2_t) -> float32x2_t {
1722 static_assert_uimm_bits!(LANE, 1);
1723 simd_insert!(src, LANE as u32, *ptr)
1724}
1725
1726#[inline]
1728#[target_feature(enable = "neon")]
1729#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1730#[rustc_legacy_const_generics(2)]
1731#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.32", LANE = 3))]
1732#[cfg_attr(
1733 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1734 assert_instr(ld1, LANE = 3)
1735)]
1736#[cfg_attr(
1737 not(target_arch = "arm"),
1738 stable(feature = "neon_intrinsics", since = "1.59.0")
1739)]
1740#[cfg_attr(
1741 target_arch = "arm",
1742 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1743)]
1744pub unsafe fn vld1q_lane_f32<const LANE: i32>(ptr: *const f32, src: float32x4_t) -> float32x4_t {
1745 static_assert_uimm_bits!(LANE, 2);
1746 simd_insert!(src, LANE as u32, *ptr)
1747}
1748
1749#[inline]
1751#[target_feature(enable = "neon")]
1752#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1753#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.8"))]
1754#[cfg_attr(
1755 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1756 assert_instr(ld1r)
1757)]
1758#[cfg_attr(
1759 not(target_arch = "arm"),
1760 stable(feature = "neon_intrinsics", since = "1.59.0")
1761)]
1762#[cfg_attr(
1763 target_arch = "arm",
1764 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1765)]
1766pub unsafe fn vld1_dup_s8(ptr: *const i8) -> int8x8_t {
1767 let x = vld1_lane_s8::<0>(ptr, transmute(i8x8::splat(0)));
1768 simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0])
1769}
1770
1771#[inline]
1773#[target_feature(enable = "neon")]
1774#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1775#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.8"))]
1776#[cfg_attr(
1777 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1778 assert_instr(ld1r)
1779)]
1780#[cfg_attr(
1781 not(target_arch = "arm"),
1782 stable(feature = "neon_intrinsics", since = "1.59.0")
1783)]
1784#[cfg_attr(
1785 target_arch = "arm",
1786 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1787)]
1788pub unsafe fn vld1q_dup_s8(ptr: *const i8) -> int8x16_t {
1789 let x = vld1q_lane_s8::<0>(ptr, transmute(i8x16::splat(0)));
1790 simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0])
1791}
1792
1793#[inline]
1795#[target_feature(enable = "neon")]
1796#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1797#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.16"))]
1798#[cfg_attr(
1799 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1800 assert_instr(ld1r)
1801)]
1802#[cfg_attr(
1803 not(target_arch = "arm"),
1804 stable(feature = "neon_intrinsics", since = "1.59.0")
1805)]
1806#[cfg_attr(
1807 target_arch = "arm",
1808 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1809)]
1810pub unsafe fn vld1_dup_s16(ptr: *const i16) -> int16x4_t {
1811 let x = vld1_lane_s16::<0>(ptr, transmute(i16x4::splat(0)));
1812 simd_shuffle!(x, x, [0, 0, 0, 0])
1813}
1814
1815#[inline]
1817#[target_feature(enable = "neon")]
1818#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1819#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.16"))]
1820#[cfg_attr(
1821 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1822 assert_instr(ld1r)
1823)]
1824#[cfg_attr(
1825 not(target_arch = "arm"),
1826 stable(feature = "neon_intrinsics", since = "1.59.0")
1827)]
1828#[cfg_attr(
1829 target_arch = "arm",
1830 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1831)]
1832pub unsafe fn vld1q_dup_s16(ptr: *const i16) -> int16x8_t {
1833 let x = vld1q_lane_s16::<0>(ptr, transmute(i16x8::splat(0)));
1834 simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0])
1835}
1836
1837#[inline]
1839#[target_feature(enable = "neon")]
1840#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1841#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.32"))]
1842#[cfg_attr(
1843 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1844 assert_instr(ld1r)
1845)]
1846#[cfg_attr(
1847 not(target_arch = "arm"),
1848 stable(feature = "neon_intrinsics", since = "1.59.0")
1849)]
1850#[cfg_attr(
1851 target_arch = "arm",
1852 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1853)]
1854pub unsafe fn vld1_dup_s32(ptr: *const i32) -> int32x2_t {
1855 let x = vld1_lane_s32::<0>(ptr, transmute(i32x2::splat(0)));
1856 simd_shuffle!(x, x, [0, 0])
1857}
1858
1859#[inline]
1861#[target_feature(enable = "neon")]
1862#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1863#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.32"))]
1864#[cfg_attr(
1865 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1866 assert_instr(ld1r)
1867)]
1868#[cfg_attr(
1869 not(target_arch = "arm"),
1870 stable(feature = "neon_intrinsics", since = "1.59.0")
1871)]
1872#[cfg_attr(
1873 target_arch = "arm",
1874 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1875)]
1876pub unsafe fn vld1q_dup_s32(ptr: *const i32) -> int32x4_t {
1877 let x = vld1q_lane_s32::<0>(ptr, transmute(i32x4::splat(0)));
1878 simd_shuffle!(x, x, [0, 0, 0, 0])
1879}
1880
1881#[inline]
1883#[target_feature(enable = "neon")]
1884#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1885#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vldr"))]
1886#[cfg_attr(
1887 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1888 assert_instr(ldr)
1889)]
1890#[cfg_attr(
1891 not(target_arch = "arm"),
1892 stable(feature = "neon_intrinsics", since = "1.59.0")
1893)]
1894#[cfg_attr(
1895 target_arch = "arm",
1896 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1897)]
1898pub unsafe fn vld1_dup_s64(ptr: *const i64) -> int64x1_t {
1899 #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))]
1900 {
1901 crate::core_arch::aarch64::vld1_s64(ptr)
1902 }
1903 #[cfg(target_arch = "arm")]
1904 {
1905 crate::core_arch::arm::vld1_s64(ptr)
1906 }
1907}
1908
1909#[inline]
1911#[target_feature(enable = "neon")]
1912#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1913#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vldr"))]
1914#[cfg_attr(
1915 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1916 assert_instr(ld1r)
1917)]
1918#[cfg_attr(
1919 not(target_arch = "arm"),
1920 stable(feature = "neon_intrinsics", since = "1.59.0")
1921)]
1922#[cfg_attr(
1923 target_arch = "arm",
1924 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1925)]
1926pub unsafe fn vld1q_dup_s64(ptr: *const i64) -> int64x2_t {
1927 let x = vld1q_lane_s64::<0>(ptr, transmute(i64x2::splat(0)));
1928 simd_shuffle!(x, x, [0, 0])
1929}
1930
1931#[inline]
1933#[target_feature(enable = "neon")]
1934#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1935#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.8"))]
1936#[cfg_attr(
1937 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1938 assert_instr(ld1r)
1939)]
1940#[cfg_attr(
1941 not(target_arch = "arm"),
1942 stable(feature = "neon_intrinsics", since = "1.59.0")
1943)]
1944#[cfg_attr(
1945 target_arch = "arm",
1946 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1947)]
1948pub unsafe fn vld1_dup_u8(ptr: *const u8) -> uint8x8_t {
1949 let x = vld1_lane_u8::<0>(ptr, transmute(u8x8::splat(0)));
1950 simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0])
1951}
1952
1953#[inline]
1955#[target_feature(enable = "neon")]
1956#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1957#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.8"))]
1958#[cfg_attr(
1959 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1960 assert_instr(ld1r)
1961)]
1962#[cfg_attr(
1963 not(target_arch = "arm"),
1964 stable(feature = "neon_intrinsics", since = "1.59.0")
1965)]
1966#[cfg_attr(
1967 target_arch = "arm",
1968 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1969)]
1970pub unsafe fn vld1q_dup_u8(ptr: *const u8) -> uint8x16_t {
1971 let x = vld1q_lane_u8::<0>(ptr, transmute(u8x16::splat(0)));
1972 simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0])
1973}
1974
1975#[inline]
1977#[target_feature(enable = "neon")]
1978#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1979#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.16"))]
1980#[cfg_attr(
1981 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1982 assert_instr(ld1r)
1983)]
1984#[cfg_attr(
1985 not(target_arch = "arm"),
1986 stable(feature = "neon_intrinsics", since = "1.59.0")
1987)]
1988#[cfg_attr(
1989 target_arch = "arm",
1990 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1991)]
1992pub unsafe fn vld1_dup_u16(ptr: *const u16) -> uint16x4_t {
1993 let x = vld1_lane_u16::<0>(ptr, transmute(u16x4::splat(0)));
1994 simd_shuffle!(x, x, [0, 0, 0, 0])
1995}
1996
1997#[inline]
1999#[target_feature(enable = "neon")]
2000#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2001#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.16"))]
2002#[cfg_attr(
2003 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2004 assert_instr(ld1r)
2005)]
2006#[cfg_attr(
2007 not(target_arch = "arm"),
2008 stable(feature = "neon_intrinsics", since = "1.59.0")
2009)]
2010#[cfg_attr(
2011 target_arch = "arm",
2012 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2013)]
2014pub unsafe fn vld1q_dup_u16(ptr: *const u16) -> uint16x8_t {
2015 let x = vld1q_lane_u16::<0>(ptr, transmute(u16x8::splat(0)));
2016 simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0])
2017}
2018
2019#[inline]
2021#[target_feature(enable = "neon")]
2022#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2023#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.32"))]
2024#[cfg_attr(
2025 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2026 assert_instr(ld1r)
2027)]
2028#[cfg_attr(
2029 not(target_arch = "arm"),
2030 stable(feature = "neon_intrinsics", since = "1.59.0")
2031)]
2032#[cfg_attr(
2033 target_arch = "arm",
2034 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2035)]
2036pub unsafe fn vld1_dup_u32(ptr: *const u32) -> uint32x2_t {
2037 let x = vld1_lane_u32::<0>(ptr, transmute(u32x2::splat(0)));
2038 simd_shuffle!(x, x, [0, 0])
2039}
2040
2041#[inline]
2043#[target_feature(enable = "neon")]
2044#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2045#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.32"))]
2046#[cfg_attr(
2047 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2048 assert_instr(ld1r)
2049)]
2050#[cfg_attr(
2051 not(target_arch = "arm"),
2052 stable(feature = "neon_intrinsics", since = "1.59.0")
2053)]
2054#[cfg_attr(
2055 target_arch = "arm",
2056 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2057)]
2058pub unsafe fn vld1q_dup_u32(ptr: *const u32) -> uint32x4_t {
2059 let x = vld1q_lane_u32::<0>(ptr, transmute(u32x4::splat(0)));
2060 simd_shuffle!(x, x, [0, 0, 0, 0])
2061}
2062
2063#[inline]
2065#[target_feature(enable = "neon")]
2066#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2067#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vldr"))]
2068#[cfg_attr(
2069 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2070 assert_instr(ldr)
2071)]
2072#[cfg_attr(
2073 not(target_arch = "arm"),
2074 stable(feature = "neon_intrinsics", since = "1.59.0")
2075)]
2076#[cfg_attr(
2077 target_arch = "arm",
2078 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2079)]
2080pub unsafe fn vld1_dup_u64(ptr: *const u64) -> uint64x1_t {
2081 #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))]
2082 {
2083 crate::core_arch::aarch64::vld1_u64(ptr)
2084 }
2085 #[cfg(target_arch = "arm")]
2086 {
2087 crate::core_arch::arm::vld1_u64(ptr)
2088 }
2089}
2090
2091#[inline]
2093#[target_feature(enable = "neon")]
2094#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2095#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vldr"))]
2096#[cfg_attr(
2097 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2098 assert_instr(ld1r)
2099)]
2100#[cfg_attr(
2101 not(target_arch = "arm"),
2102 stable(feature = "neon_intrinsics", since = "1.59.0")
2103)]
2104#[cfg_attr(
2105 target_arch = "arm",
2106 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2107)]
2108pub unsafe fn vld1q_dup_u64(ptr: *const u64) -> uint64x2_t {
2109 let x = vld1q_lane_u64::<0>(ptr, transmute(u64x2::splat(0)));
2110 simd_shuffle!(x, x, [0, 0])
2111}
2112
2113#[inline]
2115#[target_feature(enable = "neon")]
2116#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2117#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.8"))]
2118#[cfg_attr(
2119 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2120 assert_instr(ld1r)
2121)]
2122#[cfg_attr(
2123 not(target_arch = "arm"),
2124 stable(feature = "neon_intrinsics", since = "1.59.0")
2125)]
2126#[cfg_attr(
2127 target_arch = "arm",
2128 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2129)]
2130pub unsafe fn vld1_dup_p8(ptr: *const p8) -> poly8x8_t {
2131 let x = vld1_lane_p8::<0>(ptr, transmute(u8x8::splat(0)));
2132 simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0])
2133}
2134
2135#[inline]
2137#[target_feature(enable = "neon")]
2138#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2139#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.8"))]
2140#[cfg_attr(
2141 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2142 assert_instr(ld1r)
2143)]
2144#[cfg_attr(
2145 not(target_arch = "arm"),
2146 stable(feature = "neon_intrinsics", since = "1.59.0")
2147)]
2148#[cfg_attr(
2149 target_arch = "arm",
2150 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2151)]
2152pub unsafe fn vld1q_dup_p8(ptr: *const p8) -> poly8x16_t {
2153 let x = vld1q_lane_p8::<0>(ptr, transmute(u8x16::splat(0)));
2154 simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0])
2155}
2156
2157#[inline]
2159#[target_feature(enable = "neon")]
2160#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2161#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.16"))]
2162#[cfg_attr(
2163 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2164 assert_instr(ld1r)
2165)]
2166#[cfg_attr(
2167 not(target_arch = "arm"),
2168 stable(feature = "neon_intrinsics", since = "1.59.0")
2169)]
2170#[cfg_attr(
2171 target_arch = "arm",
2172 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2173)]
2174pub unsafe fn vld1_dup_p16(ptr: *const p16) -> poly16x4_t {
2175 let x = vld1_lane_p16::<0>(ptr, transmute(u16x4::splat(0)));
2176 simd_shuffle!(x, x, [0, 0, 0, 0])
2177}
2178
2179#[inline]
2181#[target_feature(enable = "neon")]
2182#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2183#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.16"))]
2184#[cfg_attr(
2185 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2186 assert_instr(ld1r)
2187)]
2188#[cfg_attr(
2189 not(target_arch = "arm"),
2190 stable(feature = "neon_intrinsics", since = "1.59.0")
2191)]
2192#[cfg_attr(
2193 target_arch = "arm",
2194 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2195)]
2196pub unsafe fn vld1q_dup_p16(ptr: *const p16) -> poly16x8_t {
2197 let x = vld1q_lane_p16::<0>(ptr, transmute(u16x8::splat(0)));
2198 simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0])
2199}
2200
2201#[inline]
2203#[target_feature(enable = "neon")]
2204#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2205#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.32"))]
2206#[cfg_attr(
2207 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2208 assert_instr(ld1r)
2209)]
2210#[cfg_attr(
2211 not(target_arch = "arm"),
2212 stable(feature = "neon_intrinsics", since = "1.59.0")
2213)]
2214#[cfg_attr(
2215 target_arch = "arm",
2216 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2217)]
2218pub unsafe fn vld1_dup_f32(ptr: *const f32) -> float32x2_t {
2219 let x = vld1_lane_f32::<0>(ptr, transmute(f32x2::splat(0.)));
2220 simd_shuffle!(x, x, [0, 0])
2221}
2222
2223#[inline]
2227#[target_feature(enable = "neon,aes")]
2228#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2229#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vldr"))]
2230#[cfg_attr(
2231 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2232 assert_instr(ldr)
2233)]
2234#[cfg_attr(
2235 not(target_arch = "arm"),
2236 stable(feature = "neon_intrinsics", since = "1.59.0")
2237)]
2238#[cfg_attr(
2239 target_arch = "arm",
2240 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2241)]
2242pub unsafe fn vld1_dup_p64(ptr: *const p64) -> poly64x1_t {
2243 #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))]
2244 {
2245 crate::core_arch::aarch64::vld1_p64(ptr)
2246 }
2247 #[cfg(target_arch = "arm")]
2248 {
2249 crate::core_arch::arm::vld1_p64(ptr)
2250 }
2251}
2252
2253#[inline]
2257#[target_feature(enable = "neon,aes")]
2258#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2259#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vldr"))]
2260#[cfg_attr(
2261 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2262 assert_instr(ld1r)
2263)]
2264#[cfg_attr(
2265 not(target_arch = "arm"),
2266 stable(feature = "neon_intrinsics", since = "1.59.0")
2267)]
2268#[cfg_attr(
2269 target_arch = "arm",
2270 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2271)]
2272pub unsafe fn vld1q_dup_p64(ptr: *const p64) -> poly64x2_t {
2273 let x = vld1q_lane_p64::<0>(ptr, transmute(u64x2::splat(0)));
2274 simd_shuffle!(x, x, [0, 0])
2275}
2276
2277#[inline]
2279#[target_feature(enable = "neon")]
2280#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2281#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vld1.32"))]
2282#[cfg_attr(
2283 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2284 assert_instr(ld1r)
2285)]
2286#[cfg_attr(
2287 not(target_arch = "arm"),
2288 stable(feature = "neon_intrinsics", since = "1.59.0")
2289)]
2290#[cfg_attr(
2291 target_arch = "arm",
2292 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2293)]
2294pub unsafe fn vld1q_dup_f32(ptr: *const f32) -> float32x4_t {
2295 let x = vld1q_lane_f32::<0>(ptr, transmute(f32x4::splat(0.)));
2296 simd_shuffle!(x, x, [0, 0, 0, 0])
2297}
2298
2299#[inline]
2301#[target_feature(enable = "neon")]
2302#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2303#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.s8"))]
2304#[cfg_attr(
2305 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2306 assert_instr("saba")
2307)]
2308#[cfg_attr(
2309 not(target_arch = "arm"),
2310 stable(feature = "neon_intrinsics", since = "1.59.0")
2311)]
2312#[cfg_attr(
2313 target_arch = "arm",
2314 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2315)]
2316pub fn vaba_s8(a: int8x8_t, b: int8x8_t, c: int8x8_t) -> int8x8_t {
2317 unsafe { simd_add(a, vabd_s8(b, c)) }
2318}
2319#[inline]
2320#[target_feature(enable = "neon")]
2321#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2322#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.s16"))]
2323#[cfg_attr(
2324 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2325 assert_instr("saba")
2326)]
2327#[cfg_attr(
2328 not(target_arch = "arm"),
2329 stable(feature = "neon_intrinsics", since = "1.59.0")
2330)]
2331#[cfg_attr(
2332 target_arch = "arm",
2333 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2334)]
2335pub fn vaba_s16(a: int16x4_t, b: int16x4_t, c: int16x4_t) -> int16x4_t {
2336 unsafe { simd_add(a, vabd_s16(b, c)) }
2337}
2338#[inline]
2339#[target_feature(enable = "neon")]
2340#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2341#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.s32"))]
2342#[cfg_attr(
2343 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2344 assert_instr("saba")
2345)]
2346#[cfg_attr(
2347 not(target_arch = "arm"),
2348 stable(feature = "neon_intrinsics", since = "1.59.0")
2349)]
2350#[cfg_attr(
2351 target_arch = "arm",
2352 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2353)]
2354pub fn vaba_s32(a: int32x2_t, b: int32x2_t, c: int32x2_t) -> int32x2_t {
2355 unsafe { simd_add(a, vabd_s32(b, c)) }
2356}
2357#[inline]
2358#[target_feature(enable = "neon")]
2359#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2360#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.u8"))]
2361#[cfg_attr(
2362 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2363 assert_instr("uaba")
2364)]
2365#[cfg_attr(
2366 not(target_arch = "arm"),
2367 stable(feature = "neon_intrinsics", since = "1.59.0")
2368)]
2369#[cfg_attr(
2370 target_arch = "arm",
2371 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2372)]
2373pub fn vaba_u8(a: uint8x8_t, b: uint8x8_t, c: uint8x8_t) -> uint8x8_t {
2374 unsafe { simd_add(a, vabd_u8(b, c)) }
2375}
2376#[inline]
2377#[target_feature(enable = "neon")]
2378#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2379#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.u16"))]
2380#[cfg_attr(
2381 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2382 assert_instr("uaba")
2383)]
2384#[cfg_attr(
2385 not(target_arch = "arm"),
2386 stable(feature = "neon_intrinsics", since = "1.59.0")
2387)]
2388#[cfg_attr(
2389 target_arch = "arm",
2390 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2391)]
2392pub fn vaba_u16(a: uint16x4_t, b: uint16x4_t, c: uint16x4_t) -> uint16x4_t {
2393 unsafe { simd_add(a, vabd_u16(b, c)) }
2394}
2395#[inline]
2396#[target_feature(enable = "neon")]
2397#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2398#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.u32"))]
2399#[cfg_attr(
2400 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2401 assert_instr("uaba")
2402)]
2403#[cfg_attr(
2404 not(target_arch = "arm"),
2405 stable(feature = "neon_intrinsics", since = "1.59.0")
2406)]
2407#[cfg_attr(
2408 target_arch = "arm",
2409 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2410)]
2411pub fn vaba_u32(a: uint32x2_t, b: uint32x2_t, c: uint32x2_t) -> uint32x2_t {
2412 unsafe { simd_add(a, vabd_u32(b, c)) }
2413}
2414#[inline]
2416#[target_feature(enable = "neon")]
2417#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2418#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.s8"))]
2419#[cfg_attr(
2420 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2421 assert_instr("saba")
2422)]
2423#[cfg_attr(
2424 not(target_arch = "arm"),
2425 stable(feature = "neon_intrinsics", since = "1.59.0")
2426)]
2427#[cfg_attr(
2428 target_arch = "arm",
2429 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2430)]
2431pub fn vabaq_s8(a: int8x16_t, b: int8x16_t, c: int8x16_t) -> int8x16_t {
2432 unsafe { simd_add(a, vabdq_s8(b, c)) }
2433}
2434#[inline]
2435#[target_feature(enable = "neon")]
2436#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2437#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.s16"))]
2438#[cfg_attr(
2439 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2440 assert_instr("saba")
2441)]
2442#[cfg_attr(
2443 not(target_arch = "arm"),
2444 stable(feature = "neon_intrinsics", since = "1.59.0")
2445)]
2446#[cfg_attr(
2447 target_arch = "arm",
2448 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2449)]
2450pub fn vabaq_s16(a: int16x8_t, b: int16x8_t, c: int16x8_t) -> int16x8_t {
2451 unsafe { simd_add(a, vabdq_s16(b, c)) }
2452}
2453#[inline]
2454#[target_feature(enable = "neon")]
2455#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2456#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.s32"))]
2457#[cfg_attr(
2458 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2459 assert_instr("saba")
2460)]
2461#[cfg_attr(
2462 not(target_arch = "arm"),
2463 stable(feature = "neon_intrinsics", since = "1.59.0")
2464)]
2465#[cfg_attr(
2466 target_arch = "arm",
2467 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2468)]
2469pub fn vabaq_s32(a: int32x4_t, b: int32x4_t, c: int32x4_t) -> int32x4_t {
2470 unsafe { simd_add(a, vabdq_s32(b, c)) }
2471}
2472#[inline]
2473#[target_feature(enable = "neon")]
2474#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2475#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.u8"))]
2476#[cfg_attr(
2477 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2478 assert_instr("uaba")
2479)]
2480#[cfg_attr(
2481 not(target_arch = "arm"),
2482 stable(feature = "neon_intrinsics", since = "1.59.0")
2483)]
2484#[cfg_attr(
2485 target_arch = "arm",
2486 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2487)]
2488pub fn vabaq_u8(a: uint8x16_t, b: uint8x16_t, c: uint8x16_t) -> uint8x16_t {
2489 unsafe { simd_add(a, vabdq_u8(b, c)) }
2490}
2491#[inline]
2492#[target_feature(enable = "neon")]
2493#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2494#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.u16"))]
2495#[cfg_attr(
2496 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2497 assert_instr("uaba")
2498)]
2499#[cfg_attr(
2500 not(target_arch = "arm"),
2501 stable(feature = "neon_intrinsics", since = "1.59.0")
2502)]
2503#[cfg_attr(
2504 target_arch = "arm",
2505 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2506)]
2507pub fn vabaq_u16(a: uint16x8_t, b: uint16x8_t, c: uint16x8_t) -> uint16x8_t {
2508 unsafe { simd_add(a, vabdq_u16(b, c)) }
2509}
2510#[inline]
2511#[target_feature(enable = "neon")]
2512#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2513#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.u32"))]
2514#[cfg_attr(
2515 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2516 assert_instr("uaba")
2517)]
2518#[cfg_attr(
2519 not(target_arch = "arm"),
2520 stable(feature = "neon_intrinsics", since = "1.59.0")
2521)]
2522#[cfg_attr(
2523 target_arch = "arm",
2524 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2525)]
2526pub fn vabaq_u32(a: uint32x4_t, b: uint32x4_t, c: uint32x4_t) -> uint32x4_t {
2527 unsafe { simd_add(a, vabdq_u32(b, c)) }
2528}
2529
2530#[inline]
2532#[target_feature(enable = "neon")]
2533#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2534#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
2535#[cfg_attr(
2536 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2537 assert_instr(add)
2538)]
2539#[cfg_attr(
2540 not(target_arch = "arm"),
2541 stable(feature = "neon_intrinsics", since = "1.59.0")
2542)]
2543#[cfg_attr(
2544 target_arch = "arm",
2545 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2546)]
2547pub fn vadd_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t {
2548 unsafe { simd_add(a, b) }
2549}
2550
2551#[inline]
2553#[target_feature(enable = "neon")]
2554#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2555#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
2556#[cfg_attr(
2557 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2558 assert_instr(add)
2559)]
2560#[cfg_attr(
2561 not(target_arch = "arm"),
2562 stable(feature = "neon_intrinsics", since = "1.59.0")
2563)]
2564#[cfg_attr(
2565 target_arch = "arm",
2566 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2567)]
2568pub fn vaddq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t {
2569 unsafe { simd_add(a, b) }
2570}
2571
2572#[inline]
2574#[target_feature(enable = "neon")]
2575#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2576#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
2577#[cfg_attr(
2578 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2579 assert_instr(add)
2580)]
2581#[cfg_attr(
2582 not(target_arch = "arm"),
2583 stable(feature = "neon_intrinsics", since = "1.59.0")
2584)]
2585#[cfg_attr(
2586 target_arch = "arm",
2587 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2588)]
2589pub fn vadd_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t {
2590 unsafe { simd_add(a, b) }
2591}
2592
2593#[inline]
2595#[target_feature(enable = "neon")]
2596#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2597#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
2598#[cfg_attr(
2599 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2600 assert_instr(add)
2601)]
2602#[cfg_attr(
2603 not(target_arch = "arm"),
2604 stable(feature = "neon_intrinsics", since = "1.59.0")
2605)]
2606#[cfg_attr(
2607 target_arch = "arm",
2608 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2609)]
2610pub fn vaddq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t {
2611 unsafe { simd_add(a, b) }
2612}
2613
2614#[inline]
2616#[target_feature(enable = "neon")]
2617#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2618#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
2619#[cfg_attr(
2620 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2621 assert_instr(add)
2622)]
2623#[cfg_attr(
2624 not(target_arch = "arm"),
2625 stable(feature = "neon_intrinsics", since = "1.59.0")
2626)]
2627#[cfg_attr(
2628 target_arch = "arm",
2629 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2630)]
2631pub fn vadd_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t {
2632 unsafe { simd_add(a, b) }
2633}
2634
2635#[inline]
2637#[target_feature(enable = "neon")]
2638#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2639#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
2640#[cfg_attr(
2641 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2642 assert_instr(add)
2643)]
2644#[cfg_attr(
2645 not(target_arch = "arm"),
2646 stable(feature = "neon_intrinsics", since = "1.59.0")
2647)]
2648#[cfg_attr(
2649 target_arch = "arm",
2650 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2651)]
2652pub fn vaddq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t {
2653 unsafe { simd_add(a, b) }
2654}
2655
2656#[inline]
2658#[target_feature(enable = "neon")]
2659#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2660#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
2661#[cfg_attr(
2662 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2663 assert_instr(add)
2664)]
2665#[cfg_attr(
2666 not(target_arch = "arm"),
2667 stable(feature = "neon_intrinsics", since = "1.59.0")
2668)]
2669#[cfg_attr(
2670 target_arch = "arm",
2671 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2672)]
2673pub fn vaddq_s64(a: int64x2_t, b: int64x2_t) -> int64x2_t {
2674 unsafe { simd_add(a, b) }
2675}
2676
2677#[inline]
2679#[target_feature(enable = "neon")]
2680#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2681#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
2682#[cfg_attr(
2683 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2684 assert_instr(add)
2685)]
2686#[cfg_attr(
2687 not(target_arch = "arm"),
2688 stable(feature = "neon_intrinsics", since = "1.59.0")
2689)]
2690#[cfg_attr(
2691 target_arch = "arm",
2692 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2693)]
2694pub fn vadd_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
2695 unsafe { simd_add(a, b) }
2696}
2697
2698#[inline]
2700#[target_feature(enable = "neon")]
2701#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2702#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
2703#[cfg_attr(
2704 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2705 assert_instr(add)
2706)]
2707#[cfg_attr(
2708 not(target_arch = "arm"),
2709 stable(feature = "neon_intrinsics", since = "1.59.0")
2710)]
2711#[cfg_attr(
2712 target_arch = "arm",
2713 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2714)]
2715pub fn vaddq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t {
2716 unsafe { simd_add(a, b) }
2717}
2718
2719#[inline]
2721#[target_feature(enable = "neon")]
2722#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2723#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
2724#[cfg_attr(
2725 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2726 assert_instr(add)
2727)]
2728#[cfg_attr(
2729 not(target_arch = "arm"),
2730 stable(feature = "neon_intrinsics", since = "1.59.0")
2731)]
2732#[cfg_attr(
2733 target_arch = "arm",
2734 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2735)]
2736pub fn vadd_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
2737 unsafe { simd_add(a, b) }
2738}
2739
2740#[inline]
2742#[target_feature(enable = "neon")]
2743#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2744#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
2745#[cfg_attr(
2746 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2747 assert_instr(add)
2748)]
2749#[cfg_attr(
2750 not(target_arch = "arm"),
2751 stable(feature = "neon_intrinsics", since = "1.59.0")
2752)]
2753#[cfg_attr(
2754 target_arch = "arm",
2755 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2756)]
2757pub fn vaddq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
2758 unsafe { simd_add(a, b) }
2759}
2760
2761#[inline]
2763#[target_feature(enable = "neon")]
2764#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2765#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
2766#[cfg_attr(
2767 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2768 assert_instr(add)
2769)]
2770#[cfg_attr(
2771 not(target_arch = "arm"),
2772 stable(feature = "neon_intrinsics", since = "1.59.0")
2773)]
2774#[cfg_attr(
2775 target_arch = "arm",
2776 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2777)]
2778pub fn vadd_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
2779 unsafe { simd_add(a, b) }
2780}
2781
2782#[inline]
2784#[target_feature(enable = "neon")]
2785#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2786#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
2787#[cfg_attr(
2788 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2789 assert_instr(add)
2790)]
2791#[cfg_attr(
2792 not(target_arch = "arm"),
2793 stable(feature = "neon_intrinsics", since = "1.59.0")
2794)]
2795#[cfg_attr(
2796 target_arch = "arm",
2797 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2798)]
2799pub fn vaddq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
2800 unsafe { simd_add(a, b) }
2801}
2802
2803#[inline]
2805#[target_feature(enable = "neon")]
2806#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2807#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
2808#[cfg_attr(
2809 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2810 assert_instr(add)
2811)]
2812#[cfg_attr(
2813 not(target_arch = "arm"),
2814 stable(feature = "neon_intrinsics", since = "1.59.0")
2815)]
2816#[cfg_attr(
2817 target_arch = "arm",
2818 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2819)]
2820pub fn vaddq_u64(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t {
2821 unsafe { simd_add(a, b) }
2822}
2823
2824#[inline]
2826#[target_feature(enable = "neon")]
2827#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2828#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
2829#[cfg_attr(
2830 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2831 assert_instr(fadd)
2832)]
2833#[cfg_attr(
2834 not(target_arch = "arm"),
2835 stable(feature = "neon_intrinsics", since = "1.59.0")
2836)]
2837#[cfg_attr(
2838 target_arch = "arm",
2839 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2840)]
2841pub fn vadd_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t {
2842 unsafe { simd_add(a, b) }
2843}
2844
2845#[inline]
2847#[target_feature(enable = "neon")]
2848#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2849#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
2850#[cfg_attr(
2851 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2852 assert_instr(fadd)
2853)]
2854#[cfg_attr(
2855 not(target_arch = "arm"),
2856 stable(feature = "neon_intrinsics", since = "1.59.0")
2857)]
2858#[cfg_attr(
2859 target_arch = "arm",
2860 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2861)]
2862pub fn vaddq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t {
2863 unsafe { simd_add(a, b) }
2864}
2865
2866#[inline]
2868#[target_feature(enable = "neon")]
2869#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2870#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
2871#[cfg_attr(
2872 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2873 assert_instr(saddl)
2874)]
2875#[cfg_attr(
2876 not(target_arch = "arm"),
2877 stable(feature = "neon_intrinsics", since = "1.59.0")
2878)]
2879#[cfg_attr(
2880 target_arch = "arm",
2881 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2882)]
2883pub fn vaddl_s8(a: int8x8_t, b: int8x8_t) -> int16x8_t {
2884 unsafe {
2885 let a: int16x8_t = simd_cast(a);
2886 let b: int16x8_t = simd_cast(b);
2887 simd_add(a, b)
2888 }
2889}
2890
2891#[inline]
2893#[target_feature(enable = "neon")]
2894#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2895#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
2896#[cfg_attr(
2897 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2898 assert_instr(saddl)
2899)]
2900#[cfg_attr(
2901 not(target_arch = "arm"),
2902 stable(feature = "neon_intrinsics", since = "1.59.0")
2903)]
2904#[cfg_attr(
2905 target_arch = "arm",
2906 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2907)]
2908pub fn vaddl_s16(a: int16x4_t, b: int16x4_t) -> int32x4_t {
2909 unsafe {
2910 let a: int32x4_t = simd_cast(a);
2911 let b: int32x4_t = simd_cast(b);
2912 simd_add(a, b)
2913 }
2914}
2915
2916#[inline]
2918#[target_feature(enable = "neon")]
2919#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2920#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
2921#[cfg_attr(
2922 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2923 assert_instr(saddl)
2924)]
2925#[cfg_attr(
2926 not(target_arch = "arm"),
2927 stable(feature = "neon_intrinsics", since = "1.59.0")
2928)]
2929#[cfg_attr(
2930 target_arch = "arm",
2931 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2932)]
2933pub fn vaddl_s32(a: int32x2_t, b: int32x2_t) -> int64x2_t {
2934 unsafe {
2935 let a: int64x2_t = simd_cast(a);
2936 let b: int64x2_t = simd_cast(b);
2937 simd_add(a, b)
2938 }
2939}
2940
2941#[inline]
2943#[target_feature(enable = "neon")]
2944#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2945#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
2946#[cfg_attr(
2947 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2948 assert_instr(uaddl)
2949)]
2950#[cfg_attr(
2951 not(target_arch = "arm"),
2952 stable(feature = "neon_intrinsics", since = "1.59.0")
2953)]
2954#[cfg_attr(
2955 target_arch = "arm",
2956 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2957)]
2958pub fn vaddl_u8(a: uint8x8_t, b: uint8x8_t) -> uint16x8_t {
2959 unsafe {
2960 let a: uint16x8_t = simd_cast(a);
2961 let b: uint16x8_t = simd_cast(b);
2962 simd_add(a, b)
2963 }
2964}
2965
2966#[inline]
2968#[target_feature(enable = "neon")]
2969#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2970#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
2971#[cfg_attr(
2972 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2973 assert_instr(uaddl)
2974)]
2975#[cfg_attr(
2976 not(target_arch = "arm"),
2977 stable(feature = "neon_intrinsics", since = "1.59.0")
2978)]
2979#[cfg_attr(
2980 target_arch = "arm",
2981 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2982)]
2983pub fn vaddl_u16(a: uint16x4_t, b: uint16x4_t) -> uint32x4_t {
2984 unsafe {
2985 let a: uint32x4_t = simd_cast(a);
2986 let b: uint32x4_t = simd_cast(b);
2987 simd_add(a, b)
2988 }
2989}
2990
2991#[inline]
2993#[target_feature(enable = "neon")]
2994#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2995#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
2996#[cfg_attr(
2997 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2998 assert_instr(uaddl)
2999)]
3000#[cfg_attr(
3001 not(target_arch = "arm"),
3002 stable(feature = "neon_intrinsics", since = "1.59.0")
3003)]
3004#[cfg_attr(
3005 target_arch = "arm",
3006 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3007)]
3008pub fn vaddl_u32(a: uint32x2_t, b: uint32x2_t) -> uint64x2_t {
3009 unsafe {
3010 let a: uint64x2_t = simd_cast(a);
3011 let b: uint64x2_t = simd_cast(b);
3012 simd_add(a, b)
3013 }
3014}
3015
3016#[inline]
3018#[target_feature(enable = "neon")]
3019#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3020#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
3021#[cfg_attr(
3022 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3023 assert_instr(saddl2)
3024)]
3025#[cfg_attr(
3026 not(target_arch = "arm"),
3027 stable(feature = "neon_intrinsics", since = "1.59.0")
3028)]
3029#[cfg_attr(
3030 target_arch = "arm",
3031 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3032)]
3033pub fn vaddl_high_s8(a: int8x16_t, b: int8x16_t) -> int16x8_t {
3034 unsafe {
3035 let a: int8x8_t = simd_shuffle!(a, a, [8, 9, 10, 11, 12, 13, 14, 15]);
3036 let b: int8x8_t = simd_shuffle!(b, b, [8, 9, 10, 11, 12, 13, 14, 15]);
3037 let a: int16x8_t = simd_cast(a);
3038 let b: int16x8_t = simd_cast(b);
3039 simd_add(a, b)
3040 }
3041}
3042
3043#[inline]
3045#[target_feature(enable = "neon")]
3046#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3047#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
3048#[cfg_attr(
3049 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3050 assert_instr(saddl2)
3051)]
3052#[cfg_attr(
3053 not(target_arch = "arm"),
3054 stable(feature = "neon_intrinsics", since = "1.59.0")
3055)]
3056#[cfg_attr(
3057 target_arch = "arm",
3058 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3059)]
3060pub fn vaddl_high_s16(a: int16x8_t, b: int16x8_t) -> int32x4_t {
3061 unsafe {
3062 let a: int16x4_t = simd_shuffle!(a, a, [4, 5, 6, 7]);
3063 let b: int16x4_t = simd_shuffle!(b, b, [4, 5, 6, 7]);
3064 let a: int32x4_t = simd_cast(a);
3065 let b: int32x4_t = simd_cast(b);
3066 simd_add(a, b)
3067 }
3068}
3069
3070#[inline]
3072#[target_feature(enable = "neon")]
3073#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3074#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
3075#[cfg_attr(
3076 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3077 assert_instr(saddl2)
3078)]
3079#[cfg_attr(
3080 not(target_arch = "arm"),
3081 stable(feature = "neon_intrinsics", since = "1.59.0")
3082)]
3083#[cfg_attr(
3084 target_arch = "arm",
3085 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3086)]
3087pub fn vaddl_high_s32(a: int32x4_t, b: int32x4_t) -> int64x2_t {
3088 unsafe {
3089 let a: int32x2_t = simd_shuffle!(a, a, [2, 3]);
3090 let b: int32x2_t = simd_shuffle!(b, b, [2, 3]);
3091 let a: int64x2_t = simd_cast(a);
3092 let b: int64x2_t = simd_cast(b);
3093 simd_add(a, b)
3094 }
3095}
3096
3097#[inline]
3099#[target_feature(enable = "neon")]
3100#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3101#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
3102#[cfg_attr(
3103 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3104 assert_instr(uaddl2)
3105)]
3106#[cfg_attr(
3107 not(target_arch = "arm"),
3108 stable(feature = "neon_intrinsics", since = "1.59.0")
3109)]
3110#[cfg_attr(
3111 target_arch = "arm",
3112 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3113)]
3114pub fn vaddl_high_u8(a: uint8x16_t, b: uint8x16_t) -> uint16x8_t {
3115 unsafe {
3116 let a: uint8x8_t = simd_shuffle!(a, a, [8, 9, 10, 11, 12, 13, 14, 15]);
3117 let b: uint8x8_t = simd_shuffle!(b, b, [8, 9, 10, 11, 12, 13, 14, 15]);
3118 let a: uint16x8_t = simd_cast(a);
3119 let b: uint16x8_t = simd_cast(b);
3120 simd_add(a, b)
3121 }
3122}
3123
3124#[inline]
3126#[target_feature(enable = "neon")]
3127#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3128#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
3129#[cfg_attr(
3130 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3131 assert_instr(uaddl2)
3132)]
3133#[cfg_attr(
3134 not(target_arch = "arm"),
3135 stable(feature = "neon_intrinsics", since = "1.59.0")
3136)]
3137#[cfg_attr(
3138 target_arch = "arm",
3139 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3140)]
3141pub fn vaddl_high_u16(a: uint16x8_t, b: uint16x8_t) -> uint32x4_t {
3142 unsafe {
3143 let a: uint16x4_t = simd_shuffle!(a, a, [4, 5, 6, 7]);
3144 let b: uint16x4_t = simd_shuffle!(b, b, [4, 5, 6, 7]);
3145 let a: uint32x4_t = simd_cast(a);
3146 let b: uint32x4_t = simd_cast(b);
3147 simd_add(a, b)
3148 }
3149}
3150
3151#[inline]
3153#[target_feature(enable = "neon")]
3154#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3155#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
3156#[cfg_attr(
3157 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3158 assert_instr(uaddl2)
3159)]
3160#[cfg_attr(
3161 not(target_arch = "arm"),
3162 stable(feature = "neon_intrinsics", since = "1.59.0")
3163)]
3164#[cfg_attr(
3165 target_arch = "arm",
3166 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3167)]
3168pub fn vaddl_high_u32(a: uint32x4_t, b: uint32x4_t) -> uint64x2_t {
3169 unsafe {
3170 let a: uint32x2_t = simd_shuffle!(a, a, [2, 3]);
3171 let b: uint32x2_t = simd_shuffle!(b, b, [2, 3]);
3172 let a: uint64x2_t = simd_cast(a);
3173 let b: uint64x2_t = simd_cast(b);
3174 simd_add(a, b)
3175 }
3176}
3177
3178#[inline]
3180#[target_feature(enable = "neon")]
3181#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3182#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
3183#[cfg_attr(
3184 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3185 assert_instr(saddw)
3186)]
3187#[cfg_attr(
3188 not(target_arch = "arm"),
3189 stable(feature = "neon_intrinsics", since = "1.59.0")
3190)]
3191#[cfg_attr(
3192 target_arch = "arm",
3193 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3194)]
3195pub fn vaddw_s8(a: int16x8_t, b: int8x8_t) -> int16x8_t {
3196 unsafe {
3197 let b: int16x8_t = simd_cast(b);
3198 simd_add(a, b)
3199 }
3200}
3201
3202#[inline]
3204#[target_feature(enable = "neon")]
3205#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3206#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
3207#[cfg_attr(
3208 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3209 assert_instr(saddw)
3210)]
3211#[cfg_attr(
3212 not(target_arch = "arm"),
3213 stable(feature = "neon_intrinsics", since = "1.59.0")
3214)]
3215#[cfg_attr(
3216 target_arch = "arm",
3217 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3218)]
3219pub fn vaddw_s16(a: int32x4_t, b: int16x4_t) -> int32x4_t {
3220 unsafe {
3221 let b: int32x4_t = simd_cast(b);
3222 simd_add(a, b)
3223 }
3224}
3225
3226#[inline]
3228#[target_feature(enable = "neon")]
3229#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3230#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
3231#[cfg_attr(
3232 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3233 assert_instr(saddw)
3234)]
3235#[cfg_attr(
3236 not(target_arch = "arm"),
3237 stable(feature = "neon_intrinsics", since = "1.59.0")
3238)]
3239#[cfg_attr(
3240 target_arch = "arm",
3241 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3242)]
3243pub fn vaddw_s32(a: int64x2_t, b: int32x2_t) -> int64x2_t {
3244 unsafe {
3245 let b: int64x2_t = simd_cast(b);
3246 simd_add(a, b)
3247 }
3248}
3249
3250#[inline]
3252#[target_feature(enable = "neon")]
3253#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3254#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
3255#[cfg_attr(
3256 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3257 assert_instr(uaddw)
3258)]
3259#[cfg_attr(
3260 not(target_arch = "arm"),
3261 stable(feature = "neon_intrinsics", since = "1.59.0")
3262)]
3263#[cfg_attr(
3264 target_arch = "arm",
3265 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3266)]
3267pub fn vaddw_u8(a: uint16x8_t, b: uint8x8_t) -> uint16x8_t {
3268 unsafe {
3269 let b: uint16x8_t = simd_cast(b);
3270 simd_add(a, b)
3271 }
3272}
3273
3274#[inline]
3276#[target_feature(enable = "neon")]
3277#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3278#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
3279#[cfg_attr(
3280 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3281 assert_instr(uaddw)
3282)]
3283#[cfg_attr(
3284 not(target_arch = "arm"),
3285 stable(feature = "neon_intrinsics", since = "1.59.0")
3286)]
3287#[cfg_attr(
3288 target_arch = "arm",
3289 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3290)]
3291pub fn vaddw_u16(a: uint32x4_t, b: uint16x4_t) -> uint32x4_t {
3292 unsafe {
3293 let b: uint32x4_t = simd_cast(b);
3294 simd_add(a, b)
3295 }
3296}
3297
3298#[inline]
3300#[target_feature(enable = "neon")]
3301#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3302#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
3303#[cfg_attr(
3304 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3305 assert_instr(uaddw)
3306)]
3307#[cfg_attr(
3308 not(target_arch = "arm"),
3309 stable(feature = "neon_intrinsics", since = "1.59.0")
3310)]
3311#[cfg_attr(
3312 target_arch = "arm",
3313 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3314)]
3315pub fn vaddw_u32(a: uint64x2_t, b: uint32x2_t) -> uint64x2_t {
3316 unsafe {
3317 let b: uint64x2_t = simd_cast(b);
3318 simd_add(a, b)
3319 }
3320}
3321
3322#[inline]
3324#[target_feature(enable = "neon")]
3325#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3326#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
3327#[cfg_attr(
3328 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3329 assert_instr(saddw2)
3330)]
3331#[cfg_attr(
3332 not(target_arch = "arm"),
3333 stable(feature = "neon_intrinsics", since = "1.59.0")
3334)]
3335#[cfg_attr(
3336 target_arch = "arm",
3337 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3338)]
3339pub fn vaddw_high_s8(a: int16x8_t, b: int8x16_t) -> int16x8_t {
3340 unsafe {
3341 let b: int8x8_t = simd_shuffle!(b, b, [8, 9, 10, 11, 12, 13, 14, 15]);
3342 let b: int16x8_t = simd_cast(b);
3343 simd_add(a, b)
3344 }
3345}
3346
3347#[inline]
3349#[target_feature(enable = "neon")]
3350#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3351#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
3352#[cfg_attr(
3353 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3354 assert_instr(saddw2)
3355)]
3356#[cfg_attr(
3357 not(target_arch = "arm"),
3358 stable(feature = "neon_intrinsics", since = "1.59.0")
3359)]
3360#[cfg_attr(
3361 target_arch = "arm",
3362 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3363)]
3364pub fn vaddw_high_s16(a: int32x4_t, b: int16x8_t) -> int32x4_t {
3365 unsafe {
3366 let b: int16x4_t = simd_shuffle!(b, b, [4, 5, 6, 7]);
3367 let b: int32x4_t = simd_cast(b);
3368 simd_add(a, b)
3369 }
3370}
3371
3372#[inline]
3374#[target_feature(enable = "neon")]
3375#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3376#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
3377#[cfg_attr(
3378 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3379 assert_instr(saddw2)
3380)]
3381#[cfg_attr(
3382 not(target_arch = "arm"),
3383 stable(feature = "neon_intrinsics", since = "1.59.0")
3384)]
3385#[cfg_attr(
3386 target_arch = "arm",
3387 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3388)]
3389pub fn vaddw_high_s32(a: int64x2_t, b: int32x4_t) -> int64x2_t {
3390 unsafe {
3391 let b: int32x2_t = simd_shuffle!(b, b, [2, 3]);
3392 let b: int64x2_t = simd_cast(b);
3393 simd_add(a, b)
3394 }
3395}
3396
3397#[inline]
3399#[target_feature(enable = "neon")]
3400#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3401#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
3402#[cfg_attr(
3403 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3404 assert_instr(uaddw2)
3405)]
3406#[cfg_attr(
3407 not(target_arch = "arm"),
3408 stable(feature = "neon_intrinsics", since = "1.59.0")
3409)]
3410#[cfg_attr(
3411 target_arch = "arm",
3412 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3413)]
3414pub fn vaddw_high_u8(a: uint16x8_t, b: uint8x16_t) -> uint16x8_t {
3415 unsafe {
3416 let b: uint8x8_t = simd_shuffle!(b, b, [8, 9, 10, 11, 12, 13, 14, 15]);
3417 let b: uint16x8_t = simd_cast(b);
3418 simd_add(a, b)
3419 }
3420}
3421
3422#[inline]
3424#[target_feature(enable = "neon")]
3425#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3426#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
3427#[cfg_attr(
3428 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3429 assert_instr(uaddw2)
3430)]
3431#[cfg_attr(
3432 not(target_arch = "arm"),
3433 stable(feature = "neon_intrinsics", since = "1.59.0")
3434)]
3435#[cfg_attr(
3436 target_arch = "arm",
3437 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3438)]
3439pub fn vaddw_high_u16(a: uint32x4_t, b: uint16x8_t) -> uint32x4_t {
3440 unsafe {
3441 let b: uint16x4_t = simd_shuffle!(b, b, [4, 5, 6, 7]);
3442 let b: uint32x4_t = simd_cast(b);
3443 simd_add(a, b)
3444 }
3445}
3446
3447#[inline]
3449#[target_feature(enable = "neon")]
3450#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3451#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
3452#[cfg_attr(
3453 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3454 assert_instr(uaddw2)
3455)]
3456#[cfg_attr(
3457 not(target_arch = "arm"),
3458 stable(feature = "neon_intrinsics", since = "1.59.0")
3459)]
3460#[cfg_attr(
3461 target_arch = "arm",
3462 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3463)]
3464pub fn vaddw_high_u32(a: uint64x2_t, b: uint32x4_t) -> uint64x2_t {
3465 unsafe {
3466 let b: uint32x2_t = simd_shuffle!(b, b, [2, 3]);
3467 let b: uint64x2_t = simd_cast(b);
3468 simd_add(a, b)
3469 }
3470}
3471
3472#[inline]
3474#[target_feature(enable = "neon")]
3475#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3476#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
3477#[cfg_attr(
3478 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3479 assert_instr(addhn)
3480)]
3481#[cfg_attr(
3482 not(target_arch = "arm"),
3483 stable(feature = "neon_intrinsics", since = "1.59.0")
3484)]
3485#[cfg_attr(
3486 target_arch = "arm",
3487 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3488)]
3489pub fn vaddhn_s16(a: int16x8_t, b: int16x8_t) -> int8x8_t {
3490 unsafe { simd_cast(simd_shr(simd_add(a, b), int16x8_t::splat(8))) }
3491}
3492
3493#[inline]
3495#[target_feature(enable = "neon")]
3496#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3497#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
3498#[cfg_attr(
3499 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3500 assert_instr(addhn)
3501)]
3502#[cfg_attr(
3503 not(target_arch = "arm"),
3504 stable(feature = "neon_intrinsics", since = "1.59.0")
3505)]
3506#[cfg_attr(
3507 target_arch = "arm",
3508 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3509)]
3510pub fn vaddhn_s32(a: int32x4_t, b: int32x4_t) -> int16x4_t {
3511 unsafe { simd_cast(simd_shr(simd_add(a, b), int32x4_t::splat(16))) }
3512}
3513
3514#[inline]
3516#[target_feature(enable = "neon")]
3517#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3518#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
3519#[cfg_attr(
3520 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3521 assert_instr(addhn)
3522)]
3523#[cfg_attr(
3524 not(target_arch = "arm"),
3525 stable(feature = "neon_intrinsics", since = "1.59.0")
3526)]
3527#[cfg_attr(
3528 target_arch = "arm",
3529 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3530)]
3531pub fn vaddhn_s64(a: int64x2_t, b: int64x2_t) -> int32x2_t {
3532 unsafe { simd_cast(simd_shr(simd_add(a, b), int64x2_t::splat(32))) }
3533}
3534
3535#[inline]
3537#[target_feature(enable = "neon")]
3538#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3539#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
3540#[cfg_attr(
3541 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3542 assert_instr(addhn)
3543)]
3544#[cfg_attr(
3545 not(target_arch = "arm"),
3546 stable(feature = "neon_intrinsics", since = "1.59.0")
3547)]
3548#[cfg_attr(
3549 target_arch = "arm",
3550 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3551)]
3552pub fn vaddhn_u16(a: uint16x8_t, b: uint16x8_t) -> uint8x8_t {
3553 unsafe { simd_cast(simd_shr(simd_add(a, b), uint16x8_t::splat(8))) }
3554}
3555
3556#[inline]
3558#[target_feature(enable = "neon")]
3559#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3560#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
3561#[cfg_attr(
3562 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3563 assert_instr(addhn)
3564)]
3565#[cfg_attr(
3566 not(target_arch = "arm"),
3567 stable(feature = "neon_intrinsics", since = "1.59.0")
3568)]
3569#[cfg_attr(
3570 target_arch = "arm",
3571 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3572)]
3573pub fn vaddhn_u32(a: uint32x4_t, b: uint32x4_t) -> uint16x4_t {
3574 unsafe { simd_cast(simd_shr(simd_add(a, b), uint32x4_t::splat(16))) }
3575}
3576
3577#[inline]
3579#[target_feature(enable = "neon")]
3580#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3581#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
3582#[cfg_attr(
3583 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3584 assert_instr(addhn)
3585)]
3586#[cfg_attr(
3587 not(target_arch = "arm"),
3588 stable(feature = "neon_intrinsics", since = "1.59.0")
3589)]
3590#[cfg_attr(
3591 target_arch = "arm",
3592 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3593)]
3594pub fn vaddhn_u64(a: uint64x2_t, b: uint64x2_t) -> uint32x2_t {
3595 unsafe { simd_cast(simd_shr(simd_add(a, b), uint64x2_t::splat(32))) }
3596}
3597
3598#[inline]
3600#[target_feature(enable = "neon")]
3601#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3602#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
3603#[cfg_attr(
3604 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3605 assert_instr(addhn2)
3606)]
3607#[cfg_attr(
3608 not(target_arch = "arm"),
3609 stable(feature = "neon_intrinsics", since = "1.59.0")
3610)]
3611#[cfg_attr(
3612 target_arch = "arm",
3613 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3614)]
3615pub fn vaddhn_high_s16(r: int8x8_t, a: int16x8_t, b: int16x8_t) -> int8x16_t {
3616 unsafe {
3617 let x = simd_cast(simd_shr(simd_add(a, b), int16x8_t::splat(8)));
3618 simd_shuffle!(r, x, [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15])
3619 }
3620}
3621
3622#[inline]
3624#[target_feature(enable = "neon")]
3625#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3626#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
3627#[cfg_attr(
3628 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3629 assert_instr(addhn2)
3630)]
3631#[cfg_attr(
3632 not(target_arch = "arm"),
3633 stable(feature = "neon_intrinsics", since = "1.59.0")
3634)]
3635#[cfg_attr(
3636 target_arch = "arm",
3637 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3638)]
3639pub fn vaddhn_high_s32(r: int16x4_t, a: int32x4_t, b: int32x4_t) -> int16x8_t {
3640 unsafe {
3641 let x = simd_cast(simd_shr(simd_add(a, b), int32x4_t::splat(16)));
3642 simd_shuffle!(r, x, [0, 1, 2, 3, 4, 5, 6, 7])
3643 }
3644}
3645
3646#[inline]
3648#[target_feature(enable = "neon")]
3649#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3650#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
3651#[cfg_attr(
3652 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3653 assert_instr(addhn2)
3654)]
3655#[cfg_attr(
3656 not(target_arch = "arm"),
3657 stable(feature = "neon_intrinsics", since = "1.59.0")
3658)]
3659#[cfg_attr(
3660 target_arch = "arm",
3661 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3662)]
3663pub fn vaddhn_high_s64(r: int32x2_t, a: int64x2_t, b: int64x2_t) -> int32x4_t {
3664 unsafe {
3665 let x = simd_cast(simd_shr(simd_add(a, b), int64x2_t::splat(32)));
3666 simd_shuffle!(r, x, [0, 1, 2, 3])
3667 }
3668}
3669
3670#[inline]
3672#[target_feature(enable = "neon")]
3673#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3674#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
3675#[cfg_attr(
3676 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3677 assert_instr(addhn2)
3678)]
3679#[cfg_attr(
3680 not(target_arch = "arm"),
3681 stable(feature = "neon_intrinsics", since = "1.59.0")
3682)]
3683#[cfg_attr(
3684 target_arch = "arm",
3685 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3686)]
3687pub fn vaddhn_high_u16(r: uint8x8_t, a: uint16x8_t, b: uint16x8_t) -> uint8x16_t {
3688 unsafe {
3689 let x = simd_cast(simd_shr(simd_add(a, b), uint16x8_t::splat(8)));
3690 simd_shuffle!(r, x, [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15])
3691 }
3692}
3693
3694#[inline]
3696#[target_feature(enable = "neon")]
3697#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3698#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
3699#[cfg_attr(
3700 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3701 assert_instr(addhn2)
3702)]
3703#[cfg_attr(
3704 not(target_arch = "arm"),
3705 stable(feature = "neon_intrinsics", since = "1.59.0")
3706)]
3707#[cfg_attr(
3708 target_arch = "arm",
3709 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3710)]
3711pub fn vaddhn_high_u32(r: uint16x4_t, a: uint32x4_t, b: uint32x4_t) -> uint16x8_t {
3712 unsafe {
3713 let x = simd_cast(simd_shr(simd_add(a, b), uint32x4_t::splat(16)));
3714 simd_shuffle!(r, x, [0, 1, 2, 3, 4, 5, 6, 7])
3715 }
3716}
3717
3718#[inline]
3720#[target_feature(enable = "neon")]
3721#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3722#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
3723#[cfg_attr(
3724 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3725 assert_instr(addhn2)
3726)]
3727#[cfg_attr(
3728 not(target_arch = "arm"),
3729 stable(feature = "neon_intrinsics", since = "1.59.0")
3730)]
3731#[cfg_attr(
3732 target_arch = "arm",
3733 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3734)]
3735pub fn vaddhn_high_u64(r: uint32x2_t, a: uint64x2_t, b: uint64x2_t) -> uint32x4_t {
3736 unsafe {
3737 let x = simd_cast(simd_shr(simd_add(a, b), uint64x2_t::splat(32)));
3738 simd_shuffle!(r, x, [0, 1, 2, 3])
3739 }
3740}
3741
3742#[inline]
3744#[target_feature(enable = "neon")]
3745#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3746#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmovn))]
3747#[cfg_attr(
3748 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3749 assert_instr(xtn)
3750)]
3751#[cfg_attr(
3752 not(target_arch = "arm"),
3753 stable(feature = "neon_intrinsics", since = "1.59.0")
3754)]
3755#[cfg_attr(
3756 target_arch = "arm",
3757 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3758)]
3759pub fn vmovn_s16(a: int16x8_t) -> int8x8_t {
3760 unsafe { simd_cast(a) }
3761}
3762
3763#[inline]
3765#[target_feature(enable = "neon")]
3766#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3767#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmovn))]
3768#[cfg_attr(
3769 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3770 assert_instr(xtn)
3771)]
3772#[cfg_attr(
3773 not(target_arch = "arm"),
3774 stable(feature = "neon_intrinsics", since = "1.59.0")
3775)]
3776#[cfg_attr(
3777 target_arch = "arm",
3778 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3779)]
3780pub fn vmovn_s32(a: int32x4_t) -> int16x4_t {
3781 unsafe { simd_cast(a) }
3782}
3783
3784#[inline]
3786#[target_feature(enable = "neon")]
3787#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3788#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmovn))]
3789#[cfg_attr(
3790 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3791 assert_instr(xtn)
3792)]
3793#[cfg_attr(
3794 not(target_arch = "arm"),
3795 stable(feature = "neon_intrinsics", since = "1.59.0")
3796)]
3797#[cfg_attr(
3798 target_arch = "arm",
3799 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3800)]
3801pub fn vmovn_s64(a: int64x2_t) -> int32x2_t {
3802 unsafe { simd_cast(a) }
3803}
3804
3805#[inline]
3807#[target_feature(enable = "neon")]
3808#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3809#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmovn))]
3810#[cfg_attr(
3811 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3812 assert_instr(xtn)
3813)]
3814#[cfg_attr(
3815 not(target_arch = "arm"),
3816 stable(feature = "neon_intrinsics", since = "1.59.0")
3817)]
3818#[cfg_attr(
3819 target_arch = "arm",
3820 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3821)]
3822pub fn vmovn_u16(a: uint16x8_t) -> uint8x8_t {
3823 unsafe { simd_cast(a) }
3824}
3825
3826#[inline]
3828#[target_feature(enable = "neon")]
3829#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3830#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmovn))]
3831#[cfg_attr(
3832 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3833 assert_instr(xtn)
3834)]
3835#[cfg_attr(
3836 not(target_arch = "arm"),
3837 stable(feature = "neon_intrinsics", since = "1.59.0")
3838)]
3839#[cfg_attr(
3840 target_arch = "arm",
3841 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3842)]
3843pub fn vmovn_u32(a: uint32x4_t) -> uint16x4_t {
3844 unsafe { simd_cast(a) }
3845}
3846
3847#[inline]
3849#[target_feature(enable = "neon")]
3850#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3851#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmovn))]
3852#[cfg_attr(
3853 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3854 assert_instr(xtn)
3855)]
3856#[cfg_attr(
3857 not(target_arch = "arm"),
3858 stable(feature = "neon_intrinsics", since = "1.59.0")
3859)]
3860#[cfg_attr(
3861 target_arch = "arm",
3862 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3863)]
3864pub fn vmovn_u64(a: uint64x2_t) -> uint32x2_t {
3865 unsafe { simd_cast(a) }
3866}
3867
3868#[inline]
3870#[target_feature(enable = "neon")]
3871#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3872#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmovl))]
3873#[cfg_attr(
3874 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3875 assert_instr(sxtl)
3876)]
3877#[cfg_attr(
3878 not(target_arch = "arm"),
3879 stable(feature = "neon_intrinsics", since = "1.59.0")
3880)]
3881#[cfg_attr(
3882 target_arch = "arm",
3883 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3884)]
3885pub fn vmovl_s8(a: int8x8_t) -> int16x8_t {
3886 unsafe { simd_cast(a) }
3887}
3888
3889#[inline]
3891#[target_feature(enable = "neon")]
3892#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3893#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmovl))]
3894#[cfg_attr(
3895 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3896 assert_instr(sxtl)
3897)]
3898#[cfg_attr(
3899 not(target_arch = "arm"),
3900 stable(feature = "neon_intrinsics", since = "1.59.0")
3901)]
3902#[cfg_attr(
3903 target_arch = "arm",
3904 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3905)]
3906pub fn vmovl_s16(a: int16x4_t) -> int32x4_t {
3907 unsafe { simd_cast(a) }
3908}
3909
3910#[inline]
3912#[target_feature(enable = "neon")]
3913#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3914#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmovl))]
3915#[cfg_attr(
3916 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3917 assert_instr(sxtl)
3918)]
3919#[cfg_attr(
3920 not(target_arch = "arm"),
3921 stable(feature = "neon_intrinsics", since = "1.59.0")
3922)]
3923#[cfg_attr(
3924 target_arch = "arm",
3925 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3926)]
3927pub fn vmovl_s32(a: int32x2_t) -> int64x2_t {
3928 unsafe { simd_cast(a) }
3929}
3930
3931#[inline]
3933#[target_feature(enable = "neon")]
3934#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3935#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmovl))]
3936#[cfg_attr(
3937 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3938 assert_instr(uxtl)
3939)]
3940#[cfg_attr(
3941 not(target_arch = "arm"),
3942 stable(feature = "neon_intrinsics", since = "1.59.0")
3943)]
3944#[cfg_attr(
3945 target_arch = "arm",
3946 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3947)]
3948pub fn vmovl_u8(a: uint8x8_t) -> uint16x8_t {
3949 unsafe { simd_cast(a) }
3950}
3951
3952#[inline]
3954#[target_feature(enable = "neon")]
3955#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3956#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmovl))]
3957#[cfg_attr(
3958 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3959 assert_instr(uxtl)
3960)]
3961#[cfg_attr(
3962 not(target_arch = "arm"),
3963 stable(feature = "neon_intrinsics", since = "1.59.0")
3964)]
3965#[cfg_attr(
3966 target_arch = "arm",
3967 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3968)]
3969pub fn vmovl_u16(a: uint16x4_t) -> uint32x4_t {
3970 unsafe { simd_cast(a) }
3971}
3972
3973#[inline]
3975#[target_feature(enable = "neon")]
3976#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3977#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmovl))]
3978#[cfg_attr(
3979 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3980 assert_instr(uxtl)
3981)]
3982#[cfg_attr(
3983 not(target_arch = "arm"),
3984 stable(feature = "neon_intrinsics", since = "1.59.0")
3985)]
3986#[cfg_attr(
3987 target_arch = "arm",
3988 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3989)]
3990pub fn vmovl_u32(a: uint32x2_t) -> uint64x2_t {
3991 unsafe { simd_cast(a) }
3992}
3993
3994#[inline]
3996#[target_feature(enable = "neon")]
3997#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3998#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmvn))]
3999#[cfg_attr(
4000 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4001 assert_instr(mvn)
4002)]
4003#[cfg_attr(
4004 not(target_arch = "arm"),
4005 stable(feature = "neon_intrinsics", since = "1.59.0")
4006)]
4007#[cfg_attr(
4008 target_arch = "arm",
4009 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4010)]
4011pub fn vmvn_s8(a: int8x8_t) -> int8x8_t {
4012 let b = int8x8_t::splat(-1);
4013 unsafe { simd_xor(a, b) }
4014}
4015
4016#[inline]
4018#[target_feature(enable = "neon")]
4019#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4020#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmvn))]
4021#[cfg_attr(
4022 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4023 assert_instr(mvn)
4024)]
4025#[cfg_attr(
4026 not(target_arch = "arm"),
4027 stable(feature = "neon_intrinsics", since = "1.59.0")
4028)]
4029#[cfg_attr(
4030 target_arch = "arm",
4031 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4032)]
4033pub fn vmvnq_s8(a: int8x16_t) -> int8x16_t {
4034 let b = int8x16_t::splat(-1);
4035 unsafe { simd_xor(a, b) }
4036}
4037
4038#[inline]
4040#[target_feature(enable = "neon")]
4041#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4042#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmvn))]
4043#[cfg_attr(
4044 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4045 assert_instr(mvn)
4046)]
4047#[cfg_attr(
4048 not(target_arch = "arm"),
4049 stable(feature = "neon_intrinsics", since = "1.59.0")
4050)]
4051#[cfg_attr(
4052 target_arch = "arm",
4053 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4054)]
4055pub fn vmvn_s16(a: int16x4_t) -> int16x4_t {
4056 let b = int16x4_t::splat(-1);
4057 unsafe { simd_xor(a, b) }
4058}
4059
4060#[inline]
4062#[target_feature(enable = "neon")]
4063#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4064#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmvn))]
4065#[cfg_attr(
4066 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4067 assert_instr(mvn)
4068)]
4069#[cfg_attr(
4070 not(target_arch = "arm"),
4071 stable(feature = "neon_intrinsics", since = "1.59.0")
4072)]
4073#[cfg_attr(
4074 target_arch = "arm",
4075 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4076)]
4077pub fn vmvnq_s16(a: int16x8_t) -> int16x8_t {
4078 let b = int16x8_t::splat(-1);
4079 unsafe { simd_xor(a, b) }
4080}
4081
4082#[inline]
4084#[target_feature(enable = "neon")]
4085#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4086#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmvn))]
4087#[cfg_attr(
4088 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4089 assert_instr(mvn)
4090)]
4091#[cfg_attr(
4092 not(target_arch = "arm"),
4093 stable(feature = "neon_intrinsics", since = "1.59.0")
4094)]
4095#[cfg_attr(
4096 target_arch = "arm",
4097 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4098)]
4099pub fn vmvn_s32(a: int32x2_t) -> int32x2_t {
4100 let b = int32x2_t::splat(-1);
4101 unsafe { simd_xor(a, b) }
4102}
4103
4104#[inline]
4106#[target_feature(enable = "neon")]
4107#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4108#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmvn))]
4109#[cfg_attr(
4110 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4111 assert_instr(mvn)
4112)]
4113#[cfg_attr(
4114 not(target_arch = "arm"),
4115 stable(feature = "neon_intrinsics", since = "1.59.0")
4116)]
4117#[cfg_attr(
4118 target_arch = "arm",
4119 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4120)]
4121pub fn vmvnq_s32(a: int32x4_t) -> int32x4_t {
4122 let b = int32x4_t::splat(-1);
4123 unsafe { simd_xor(a, b) }
4124}
4125
4126#[inline]
4128#[target_feature(enable = "neon")]
4129#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4130#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmvn))]
4131#[cfg_attr(
4132 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4133 assert_instr(mvn)
4134)]
4135#[cfg_attr(
4136 not(target_arch = "arm"),
4137 stable(feature = "neon_intrinsics", since = "1.59.0")
4138)]
4139#[cfg_attr(
4140 target_arch = "arm",
4141 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4142)]
4143pub fn vmvn_u8(a: uint8x8_t) -> uint8x8_t {
4144 let b = uint8x8_t::splat(255);
4145 unsafe { simd_xor(a, b) }
4146}
4147
4148#[inline]
4150#[target_feature(enable = "neon")]
4151#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4152#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmvn))]
4153#[cfg_attr(
4154 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4155 assert_instr(mvn)
4156)]
4157#[cfg_attr(
4158 not(target_arch = "arm"),
4159 stable(feature = "neon_intrinsics", since = "1.59.0")
4160)]
4161#[cfg_attr(
4162 target_arch = "arm",
4163 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4164)]
4165pub fn vmvnq_u8(a: uint8x16_t) -> uint8x16_t {
4166 let b = uint8x16_t::splat(255);
4167 unsafe { simd_xor(a, b) }
4168}
4169
4170#[inline]
4172#[target_feature(enable = "neon")]
4173#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4174#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmvn))]
4175#[cfg_attr(
4176 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4177 assert_instr(mvn)
4178)]
4179#[cfg_attr(
4180 not(target_arch = "arm"),
4181 stable(feature = "neon_intrinsics", since = "1.59.0")
4182)]
4183#[cfg_attr(
4184 target_arch = "arm",
4185 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4186)]
4187pub fn vmvn_u16(a: uint16x4_t) -> uint16x4_t {
4188 let b = uint16x4_t::splat(65_535);
4189 unsafe { simd_xor(a, b) }
4190}
4191
4192#[inline]
4194#[target_feature(enable = "neon")]
4195#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4196#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmvn))]
4197#[cfg_attr(
4198 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4199 assert_instr(mvn)
4200)]
4201#[cfg_attr(
4202 not(target_arch = "arm"),
4203 stable(feature = "neon_intrinsics", since = "1.59.0")
4204)]
4205#[cfg_attr(
4206 target_arch = "arm",
4207 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4208)]
4209pub fn vmvnq_u16(a: uint16x8_t) -> uint16x8_t {
4210 let b = uint16x8_t::splat(65_535);
4211 unsafe { simd_xor(a, b) }
4212}
4213
4214#[inline]
4216#[target_feature(enable = "neon")]
4217#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4218#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmvn))]
4219#[cfg_attr(
4220 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4221 assert_instr(mvn)
4222)]
4223#[cfg_attr(
4224 not(target_arch = "arm"),
4225 stable(feature = "neon_intrinsics", since = "1.59.0")
4226)]
4227#[cfg_attr(
4228 target_arch = "arm",
4229 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4230)]
4231pub fn vmvn_u32(a: uint32x2_t) -> uint32x2_t {
4232 let b = uint32x2_t::splat(4_294_967_295);
4233 unsafe { simd_xor(a, b) }
4234}
4235
4236#[inline]
4238#[target_feature(enable = "neon")]
4239#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4240#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmvn))]
4241#[cfg_attr(
4242 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4243 assert_instr(mvn)
4244)]
4245#[cfg_attr(
4246 not(target_arch = "arm"),
4247 stable(feature = "neon_intrinsics", since = "1.59.0")
4248)]
4249#[cfg_attr(
4250 target_arch = "arm",
4251 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4252)]
4253pub fn vmvnq_u32(a: uint32x4_t) -> uint32x4_t {
4254 let b = uint32x4_t::splat(4_294_967_295);
4255 unsafe { simd_xor(a, b) }
4256}
4257
4258#[inline]
4260#[target_feature(enable = "neon")]
4261#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4262#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmvn))]
4263#[cfg_attr(
4264 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4265 assert_instr(mvn)
4266)]
4267#[cfg_attr(
4268 not(target_arch = "arm"),
4269 stable(feature = "neon_intrinsics", since = "1.59.0")
4270)]
4271#[cfg_attr(
4272 target_arch = "arm",
4273 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4274)]
4275pub fn vmvn_p8(a: poly8x8_t) -> poly8x8_t {
4276 let b = poly8x8_t::splat(255);
4277 unsafe { simd_xor(a, b) }
4278}
4279
4280#[inline]
4282#[target_feature(enable = "neon")]
4283#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4284#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmvn))]
4285#[cfg_attr(
4286 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4287 assert_instr(mvn)
4288)]
4289#[cfg_attr(
4290 not(target_arch = "arm"),
4291 stable(feature = "neon_intrinsics", since = "1.59.0")
4292)]
4293#[cfg_attr(
4294 target_arch = "arm",
4295 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4296)]
4297pub fn vmvnq_p8(a: poly8x16_t) -> poly8x16_t {
4298 let b = poly8x16_t::splat(255);
4299 unsafe { simd_xor(a, b) }
4300}
4301
4302#[inline]
4304#[target_feature(enable = "neon")]
4305#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4306#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
4307#[cfg_attr(
4308 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4309 assert_instr(bic)
4310)]
4311#[cfg_attr(
4312 not(target_arch = "arm"),
4313 stable(feature = "neon_intrinsics", since = "1.59.0")
4314)]
4315#[cfg_attr(
4316 target_arch = "arm",
4317 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4318)]
4319pub fn vbic_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t {
4320 let c = int8x8_t::splat(-1);
4321 unsafe { simd_and(simd_xor(b, c), a) }
4322}
4323
4324#[inline]
4326#[target_feature(enable = "neon")]
4327#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4328#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
4329#[cfg_attr(
4330 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4331 assert_instr(bic)
4332)]
4333#[cfg_attr(
4334 not(target_arch = "arm"),
4335 stable(feature = "neon_intrinsics", since = "1.59.0")
4336)]
4337#[cfg_attr(
4338 target_arch = "arm",
4339 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4340)]
4341pub fn vbicq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t {
4342 let c = int8x16_t::splat(-1);
4343 unsafe { simd_and(simd_xor(b, c), a) }
4344}
4345
4346#[inline]
4348#[target_feature(enable = "neon")]
4349#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4350#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
4351#[cfg_attr(
4352 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4353 assert_instr(bic)
4354)]
4355#[cfg_attr(
4356 not(target_arch = "arm"),
4357 stable(feature = "neon_intrinsics", since = "1.59.0")
4358)]
4359#[cfg_attr(
4360 target_arch = "arm",
4361 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4362)]
4363pub fn vbic_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t {
4364 let c = int16x4_t::splat(-1);
4365 unsafe { simd_and(simd_xor(b, c), a) }
4366}
4367
4368#[inline]
4370#[target_feature(enable = "neon")]
4371#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4372#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
4373#[cfg_attr(
4374 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4375 assert_instr(bic)
4376)]
4377#[cfg_attr(
4378 not(target_arch = "arm"),
4379 stable(feature = "neon_intrinsics", since = "1.59.0")
4380)]
4381#[cfg_attr(
4382 target_arch = "arm",
4383 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4384)]
4385pub fn vbicq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t {
4386 let c = int16x8_t::splat(-1);
4387 unsafe { simd_and(simd_xor(b, c), a) }
4388}
4389
4390#[inline]
4392#[target_feature(enable = "neon")]
4393#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4394#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
4395#[cfg_attr(
4396 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4397 assert_instr(bic)
4398)]
4399#[cfg_attr(
4400 not(target_arch = "arm"),
4401 stable(feature = "neon_intrinsics", since = "1.59.0")
4402)]
4403#[cfg_attr(
4404 target_arch = "arm",
4405 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4406)]
4407pub fn vbic_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t {
4408 let c = int32x2_t::splat(-1);
4409 unsafe { simd_and(simd_xor(b, c), a) }
4410}
4411
4412#[inline]
4414#[target_feature(enable = "neon")]
4415#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4416#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
4417#[cfg_attr(
4418 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4419 assert_instr(bic)
4420)]
4421#[cfg_attr(
4422 not(target_arch = "arm"),
4423 stable(feature = "neon_intrinsics", since = "1.59.0")
4424)]
4425#[cfg_attr(
4426 target_arch = "arm",
4427 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4428)]
4429pub fn vbicq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t {
4430 let c = int32x4_t::splat(-1);
4431 unsafe { simd_and(simd_xor(b, c), a) }
4432}
4433
4434#[inline]
4436#[target_feature(enable = "neon")]
4437#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4438#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
4439#[cfg_attr(
4440 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4441 assert_instr(bic)
4442)]
4443#[cfg_attr(
4444 not(target_arch = "arm"),
4445 stable(feature = "neon_intrinsics", since = "1.59.0")
4446)]
4447#[cfg_attr(
4448 target_arch = "arm",
4449 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4450)]
4451pub fn vbic_s64(a: int64x1_t, b: int64x1_t) -> int64x1_t {
4452 let c = int64x1_t::splat(-1);
4453 unsafe { simd_and(simd_xor(b, c), a) }
4454}
4455
4456#[inline]
4458#[target_feature(enable = "neon")]
4459#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4460#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
4461#[cfg_attr(
4462 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4463 assert_instr(bic)
4464)]
4465#[cfg_attr(
4466 not(target_arch = "arm"),
4467 stable(feature = "neon_intrinsics", since = "1.59.0")
4468)]
4469#[cfg_attr(
4470 target_arch = "arm",
4471 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4472)]
4473pub fn vbicq_s64(a: int64x2_t, b: int64x2_t) -> int64x2_t {
4474 let c = int64x2_t::splat(-1);
4475 unsafe { simd_and(simd_xor(b, c), a) }
4476}
4477
4478#[inline]
4480#[target_feature(enable = "neon")]
4481#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4482#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
4483#[cfg_attr(
4484 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4485 assert_instr(bic)
4486)]
4487#[cfg_attr(
4488 not(target_arch = "arm"),
4489 stable(feature = "neon_intrinsics", since = "1.59.0")
4490)]
4491#[cfg_attr(
4492 target_arch = "arm",
4493 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4494)]
4495pub fn vbic_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
4496 let c = int8x8_t::splat(-1);
4497 unsafe { simd_and(simd_xor(b, transmute(c)), a) }
4498}
4499
4500#[inline]
4502#[target_feature(enable = "neon")]
4503#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4504#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
4505#[cfg_attr(
4506 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4507 assert_instr(bic)
4508)]
4509#[cfg_attr(
4510 not(target_arch = "arm"),
4511 stable(feature = "neon_intrinsics", since = "1.59.0")
4512)]
4513#[cfg_attr(
4514 target_arch = "arm",
4515 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4516)]
4517pub fn vbicq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t {
4518 let c = int8x16_t::splat(-1);
4519 unsafe { simd_and(simd_xor(b, transmute(c)), a) }
4520}
4521
4522#[inline]
4524#[target_feature(enable = "neon")]
4525#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4526#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
4527#[cfg_attr(
4528 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4529 assert_instr(bic)
4530)]
4531#[cfg_attr(
4532 not(target_arch = "arm"),
4533 stable(feature = "neon_intrinsics", since = "1.59.0")
4534)]
4535#[cfg_attr(
4536 target_arch = "arm",
4537 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4538)]
4539pub fn vbic_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
4540 let c = int16x4_t::splat(-1);
4541 unsafe { simd_and(simd_xor(b, transmute(c)), a) }
4542}
4543
4544#[inline]
4546#[target_feature(enable = "neon")]
4547#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4548#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
4549#[cfg_attr(
4550 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4551 assert_instr(bic)
4552)]
4553#[cfg_attr(
4554 not(target_arch = "arm"),
4555 stable(feature = "neon_intrinsics", since = "1.59.0")
4556)]
4557#[cfg_attr(
4558 target_arch = "arm",
4559 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4560)]
4561pub fn vbicq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
4562 let c = int16x8_t::splat(-1);
4563 unsafe { simd_and(simd_xor(b, transmute(c)), a) }
4564}
4565
4566#[inline]
4568#[target_feature(enable = "neon")]
4569#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4570#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
4571#[cfg_attr(
4572 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4573 assert_instr(bic)
4574)]
4575#[cfg_attr(
4576 not(target_arch = "arm"),
4577 stable(feature = "neon_intrinsics", since = "1.59.0")
4578)]
4579#[cfg_attr(
4580 target_arch = "arm",
4581 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4582)]
4583pub fn vbic_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
4584 let c = int32x2_t::splat(-1);
4585 unsafe { simd_and(simd_xor(b, transmute(c)), a) }
4586}
4587
4588#[inline]
4590#[target_feature(enable = "neon")]
4591#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4592#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
4593#[cfg_attr(
4594 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4595 assert_instr(bic)
4596)]
4597#[cfg_attr(
4598 not(target_arch = "arm"),
4599 stable(feature = "neon_intrinsics", since = "1.59.0")
4600)]
4601#[cfg_attr(
4602 target_arch = "arm",
4603 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4604)]
4605pub fn vbicq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
4606 let c = int32x4_t::splat(-1);
4607 unsafe { simd_and(simd_xor(b, transmute(c)), a) }
4608}
4609
4610#[inline]
4612#[target_feature(enable = "neon")]
4613#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4614#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
4615#[cfg_attr(
4616 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4617 assert_instr(bic)
4618)]
4619#[cfg_attr(
4620 not(target_arch = "arm"),
4621 stable(feature = "neon_intrinsics", since = "1.59.0")
4622)]
4623#[cfg_attr(
4624 target_arch = "arm",
4625 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4626)]
4627pub fn vbic_u64(a: uint64x1_t, b: uint64x1_t) -> uint64x1_t {
4628 let c = int64x1_t::splat(-1);
4629 unsafe { simd_and(simd_xor(b, transmute(c)), a) }
4630}
4631
4632#[inline]
4634#[target_feature(enable = "neon")]
4635#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4636#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
4637#[cfg_attr(
4638 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4639 assert_instr(bic)
4640)]
4641#[cfg_attr(
4642 not(target_arch = "arm"),
4643 stable(feature = "neon_intrinsics", since = "1.59.0")
4644)]
4645#[cfg_attr(
4646 target_arch = "arm",
4647 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4648)]
4649pub fn vbicq_u64(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t {
4650 let c = int64x2_t::splat(-1);
4651 unsafe { simd_and(simd_xor(b, transmute(c)), a) }
4652}
4653
4654#[inline]
4660#[target_feature(enable = "neon")]
4661#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4662#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4663#[cfg_attr(
4664 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4665 assert_instr(bsl)
4666)]
4667#[cfg_attr(
4668 not(target_arch = "arm"),
4669 stable(feature = "neon_intrinsics", since = "1.59.0")
4670)]
4671#[cfg_attr(
4672 target_arch = "arm",
4673 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4674)]
4675pub fn vbsl_s8(a: uint8x8_t, b: int8x8_t, c: int8x8_t) -> int8x8_t {
4676 let not = int8x8_t::splat(-1);
4677 unsafe {
4678 transmute(simd_or(
4679 simd_and(a, transmute(b)),
4680 simd_and(simd_xor(a, transmute(not)), transmute(c)),
4681 ))
4682 }
4683}
4684
4685#[inline]
4687#[target_feature(enable = "neon")]
4688#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4689#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4690#[cfg_attr(
4691 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4692 assert_instr(bsl)
4693)]
4694#[cfg_attr(
4695 not(target_arch = "arm"),
4696 stable(feature = "neon_intrinsics", since = "1.59.0")
4697)]
4698#[cfg_attr(
4699 target_arch = "arm",
4700 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4701)]
4702pub fn vbsl_s16(a: uint16x4_t, b: int16x4_t, c: int16x4_t) -> int16x4_t {
4703 let not = int16x4_t::splat(-1);
4704 unsafe {
4705 transmute(simd_or(
4706 simd_and(a, transmute(b)),
4707 simd_and(simd_xor(a, transmute(not)), transmute(c)),
4708 ))
4709 }
4710}
4711
4712#[inline]
4714#[target_feature(enable = "neon")]
4715#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4716#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4717#[cfg_attr(
4718 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4719 assert_instr(bsl)
4720)]
4721#[cfg_attr(
4722 not(target_arch = "arm"),
4723 stable(feature = "neon_intrinsics", since = "1.59.0")
4724)]
4725#[cfg_attr(
4726 target_arch = "arm",
4727 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4728)]
4729pub fn vbsl_s32(a: uint32x2_t, b: int32x2_t, c: int32x2_t) -> int32x2_t {
4730 let not = int32x2_t::splat(-1);
4731 unsafe {
4732 transmute(simd_or(
4733 simd_and(a, transmute(b)),
4734 simd_and(simd_xor(a, transmute(not)), transmute(c)),
4735 ))
4736 }
4737}
4738
4739#[inline]
4741#[target_feature(enable = "neon")]
4742#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4743#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4744#[cfg_attr(
4745 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4746 assert_instr(bsl)
4747)]
4748#[cfg_attr(
4749 not(target_arch = "arm"),
4750 stable(feature = "neon_intrinsics", since = "1.59.0")
4751)]
4752#[cfg_attr(
4753 target_arch = "arm",
4754 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4755)]
4756pub fn vbsl_s64(a: uint64x1_t, b: int64x1_t, c: int64x1_t) -> int64x1_t {
4757 let not = int64x1_t::splat(-1);
4758 unsafe {
4759 transmute(simd_or(
4760 simd_and(a, transmute(b)),
4761 simd_and(simd_xor(a, transmute(not)), transmute(c)),
4762 ))
4763 }
4764}
4765
4766#[inline]
4768#[target_feature(enable = "neon")]
4769#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4770#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4771#[cfg_attr(
4772 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4773 assert_instr(bsl)
4774)]
4775#[cfg_attr(
4776 not(target_arch = "arm"),
4777 stable(feature = "neon_intrinsics", since = "1.59.0")
4778)]
4779#[cfg_attr(
4780 target_arch = "arm",
4781 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4782)]
4783pub fn vbsl_u8(a: uint8x8_t, b: uint8x8_t, c: uint8x8_t) -> uint8x8_t {
4784 let not = int8x8_t::splat(-1);
4785 unsafe { simd_or(simd_and(a, b), simd_and(simd_xor(a, transmute(not)), c)) }
4786}
4787
4788#[inline]
4790#[target_feature(enable = "neon")]
4791#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4792#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4793#[cfg_attr(
4794 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4795 assert_instr(bsl)
4796)]
4797#[cfg_attr(
4798 not(target_arch = "arm"),
4799 stable(feature = "neon_intrinsics", since = "1.59.0")
4800)]
4801#[cfg_attr(
4802 target_arch = "arm",
4803 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4804)]
4805pub fn vbsl_u16(a: uint16x4_t, b: uint16x4_t, c: uint16x4_t) -> uint16x4_t {
4806 let not = int16x4_t::splat(-1);
4807 unsafe { simd_or(simd_and(a, b), simd_and(simd_xor(a, transmute(not)), c)) }
4808}
4809
4810#[inline]
4812#[target_feature(enable = "neon")]
4813#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4814#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4815#[cfg_attr(
4816 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4817 assert_instr(bsl)
4818)]
4819#[cfg_attr(
4820 not(target_arch = "arm"),
4821 stable(feature = "neon_intrinsics", since = "1.59.0")
4822)]
4823#[cfg_attr(
4824 target_arch = "arm",
4825 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4826)]
4827pub fn vbsl_u32(a: uint32x2_t, b: uint32x2_t, c: uint32x2_t) -> uint32x2_t {
4828 let not = int32x2_t::splat(-1);
4829 unsafe { simd_or(simd_and(a, b), simd_and(simd_xor(a, transmute(not)), c)) }
4830}
4831
4832#[inline]
4834#[target_feature(enable = "neon")]
4835#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4836#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4837#[cfg_attr(
4838 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4839 assert_instr(bsl)
4840)]
4841#[cfg_attr(
4842 not(target_arch = "arm"),
4843 stable(feature = "neon_intrinsics", since = "1.59.0")
4844)]
4845#[cfg_attr(
4846 target_arch = "arm",
4847 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4848)]
4849pub fn vbsl_u64(a: uint64x1_t, b: uint64x1_t, c: uint64x1_t) -> uint64x1_t {
4850 let not = int64x1_t::splat(-1);
4851 unsafe { simd_or(simd_and(a, b), simd_and(simd_xor(a, transmute(not)), c)) }
4852}
4853
4854#[inline]
4856#[target_feature(enable = "neon,fp16")]
4857#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4858#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4859#[cfg_attr(
4860 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4861 assert_instr(bsl)
4862)]
4863#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
4864pub fn vbsl_f16(a: uint16x4_t, b: float16x4_t, c: float16x4_t) -> float16x4_t {
4865 let not = int16x4_t::splat(-1);
4866 unsafe {
4867 transmute(simd_or(
4868 simd_and(a, transmute(b)),
4869 simd_and(simd_xor(a, transmute(not)), transmute(c)),
4870 ))
4871 }
4872}
4873
4874#[inline]
4876#[target_feature(enable = "neon")]
4877#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4878#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4879#[cfg_attr(
4880 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4881 assert_instr(bsl)
4882)]
4883#[cfg_attr(
4884 not(target_arch = "arm"),
4885 stable(feature = "neon_intrinsics", since = "1.59.0")
4886)]
4887#[cfg_attr(
4888 target_arch = "arm",
4889 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4890)]
4891pub fn vbsl_f32(a: uint32x2_t, b: float32x2_t, c: float32x2_t) -> float32x2_t {
4892 let not = int32x2_t::splat(-1);
4893 unsafe {
4894 transmute(simd_or(
4895 simd_and(a, transmute(b)),
4896 simd_and(simd_xor(a, transmute(not)), transmute(c)),
4897 ))
4898 }
4899}
4900
4901#[inline]
4903#[target_feature(enable = "neon")]
4904#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4905#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4906#[cfg_attr(
4907 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4908 assert_instr(bsl)
4909)]
4910#[cfg_attr(
4911 not(target_arch = "arm"),
4912 stable(feature = "neon_intrinsics", since = "1.59.0")
4913)]
4914#[cfg_attr(
4915 target_arch = "arm",
4916 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4917)]
4918pub fn vbsl_p8(a: uint8x8_t, b: poly8x8_t, c: poly8x8_t) -> poly8x8_t {
4919 let not = int8x8_t::splat(-1);
4920 unsafe {
4921 transmute(simd_or(
4922 simd_and(a, transmute(b)),
4923 simd_and(simd_xor(a, transmute(not)), transmute(c)),
4924 ))
4925 }
4926}
4927
4928#[inline]
4930#[target_feature(enable = "neon")]
4931#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4932#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4933#[cfg_attr(
4934 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4935 assert_instr(bsl)
4936)]
4937#[cfg_attr(
4938 not(target_arch = "arm"),
4939 stable(feature = "neon_intrinsics", since = "1.59.0")
4940)]
4941#[cfg_attr(
4942 target_arch = "arm",
4943 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4944)]
4945pub fn vbsl_p16(a: uint16x4_t, b: poly16x4_t, c: poly16x4_t) -> poly16x4_t {
4946 let not = int16x4_t::splat(-1);
4947 unsafe {
4948 transmute(simd_or(
4949 simd_and(a, transmute(b)),
4950 simd_and(simd_xor(a, transmute(not)), transmute(c)),
4951 ))
4952 }
4953}
4954
4955#[inline]
4957#[target_feature(enable = "neon")]
4958#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4959#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4960#[cfg_attr(
4961 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4962 assert_instr(bsl)
4963)]
4964#[cfg_attr(
4965 not(target_arch = "arm"),
4966 stable(feature = "neon_intrinsics", since = "1.59.0")
4967)]
4968#[cfg_attr(
4969 target_arch = "arm",
4970 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4971)]
4972pub fn vbslq_s8(a: uint8x16_t, b: int8x16_t, c: int8x16_t) -> int8x16_t {
4973 let not = int8x16_t::splat(-1);
4974 unsafe {
4975 transmute(simd_or(
4976 simd_and(a, transmute(b)),
4977 simd_and(simd_xor(a, transmute(not)), transmute(c)),
4978 ))
4979 }
4980}
4981
4982#[inline]
4984#[target_feature(enable = "neon")]
4985#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4986#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4987#[cfg_attr(
4988 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4989 assert_instr(bsl)
4990)]
4991#[cfg_attr(
4992 not(target_arch = "arm"),
4993 stable(feature = "neon_intrinsics", since = "1.59.0")
4994)]
4995#[cfg_attr(
4996 target_arch = "arm",
4997 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4998)]
4999pub fn vbslq_s16(a: uint16x8_t, b: int16x8_t, c: int16x8_t) -> int16x8_t {
5000 let not = int16x8_t::splat(-1);
5001 unsafe {
5002 transmute(simd_or(
5003 simd_and(a, transmute(b)),
5004 simd_and(simd_xor(a, transmute(not)), transmute(c)),
5005 ))
5006 }
5007}
5008
5009#[inline]
5011#[target_feature(enable = "neon")]
5012#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5013#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
5014#[cfg_attr(
5015 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5016 assert_instr(bsl)
5017)]
5018#[cfg_attr(
5019 not(target_arch = "arm"),
5020 stable(feature = "neon_intrinsics", since = "1.59.0")
5021)]
5022#[cfg_attr(
5023 target_arch = "arm",
5024 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5025)]
5026pub fn vbslq_s32(a: uint32x4_t, b: int32x4_t, c: int32x4_t) -> int32x4_t {
5027 let not = int32x4_t::splat(-1);
5028 unsafe {
5029 transmute(simd_or(
5030 simd_and(a, transmute(b)),
5031 simd_and(simd_xor(a, transmute(not)), transmute(c)),
5032 ))
5033 }
5034}
5035
5036#[inline]
5038#[target_feature(enable = "neon")]
5039#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5040#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
5041#[cfg_attr(
5042 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5043 assert_instr(bsl)
5044)]
5045#[cfg_attr(
5046 not(target_arch = "arm"),
5047 stable(feature = "neon_intrinsics", since = "1.59.0")
5048)]
5049#[cfg_attr(
5050 target_arch = "arm",
5051 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5052)]
5053pub fn vbslq_s64(a: uint64x2_t, b: int64x2_t, c: int64x2_t) -> int64x2_t {
5054 let not = int64x2_t::splat(-1);
5055 unsafe {
5056 transmute(simd_or(
5057 simd_and(a, transmute(b)),
5058 simd_and(simd_xor(a, transmute(not)), transmute(c)),
5059 ))
5060 }
5061}
5062
5063#[inline]
5065#[target_feature(enable = "neon")]
5066#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5067#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
5068#[cfg_attr(
5069 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5070 assert_instr(bsl)
5071)]
5072#[cfg_attr(
5073 not(target_arch = "arm"),
5074 stable(feature = "neon_intrinsics", since = "1.59.0")
5075)]
5076#[cfg_attr(
5077 target_arch = "arm",
5078 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5079)]
5080pub fn vbslq_u8(a: uint8x16_t, b: uint8x16_t, c: uint8x16_t) -> uint8x16_t {
5081 let not = int8x16_t::splat(-1);
5082 unsafe { simd_or(simd_and(a, b), simd_and(simd_xor(a, transmute(not)), c)) }
5083}
5084
5085#[inline]
5087#[target_feature(enable = "neon")]
5088#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5089#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
5090#[cfg_attr(
5091 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5092 assert_instr(bsl)
5093)]
5094#[cfg_attr(
5095 not(target_arch = "arm"),
5096 stable(feature = "neon_intrinsics", since = "1.59.0")
5097)]
5098#[cfg_attr(
5099 target_arch = "arm",
5100 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5101)]
5102pub fn vbslq_u16(a: uint16x8_t, b: uint16x8_t, c: uint16x8_t) -> uint16x8_t {
5103 let not = int16x8_t::splat(-1);
5104 unsafe { simd_or(simd_and(a, b), simd_and(simd_xor(a, transmute(not)), c)) }
5105}
5106
5107#[inline]
5109#[target_feature(enable = "neon")]
5110#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5111#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
5112#[cfg_attr(
5113 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5114 assert_instr(bsl)
5115)]
5116#[cfg_attr(
5117 not(target_arch = "arm"),
5118 stable(feature = "neon_intrinsics", since = "1.59.0")
5119)]
5120#[cfg_attr(
5121 target_arch = "arm",
5122 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5123)]
5124pub fn vbslq_u32(a: uint32x4_t, b: uint32x4_t, c: uint32x4_t) -> uint32x4_t {
5125 let not = int32x4_t::splat(-1);
5126 unsafe { simd_or(simd_and(a, b), simd_and(simd_xor(a, transmute(not)), c)) }
5127}
5128
5129#[inline]
5131#[target_feature(enable = "neon")]
5132#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5133#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
5134#[cfg_attr(
5135 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5136 assert_instr(bsl)
5137)]
5138#[cfg_attr(
5139 not(target_arch = "arm"),
5140 stable(feature = "neon_intrinsics", since = "1.59.0")
5141)]
5142#[cfg_attr(
5143 target_arch = "arm",
5144 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5145)]
5146pub fn vbslq_u64(a: uint64x2_t, b: uint64x2_t, c: uint64x2_t) -> uint64x2_t {
5147 let not = int64x2_t::splat(-1);
5148 unsafe { simd_or(simd_and(a, b), simd_and(simd_xor(a, transmute(not)), c)) }
5149}
5150
5151#[inline]
5153#[target_feature(enable = "neon")]
5154#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5155#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
5156#[cfg_attr(
5157 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5158 assert_instr(bsl)
5159)]
5160#[cfg_attr(
5161 not(target_arch = "arm"),
5162 stable(feature = "neon_intrinsics", since = "1.59.0")
5163)]
5164#[cfg_attr(
5165 target_arch = "arm",
5166 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5167)]
5168pub fn vbslq_p8(a: uint8x16_t, b: poly8x16_t, c: poly8x16_t) -> poly8x16_t {
5169 let not = int8x16_t::splat(-1);
5170 unsafe {
5171 transmute(simd_or(
5172 simd_and(a, transmute(b)),
5173 simd_and(simd_xor(a, transmute(not)), transmute(c)),
5174 ))
5175 }
5176}
5177
5178#[inline]
5180#[target_feature(enable = "neon")]
5181#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5182#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
5183#[cfg_attr(
5184 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5185 assert_instr(bsl)
5186)]
5187#[cfg_attr(
5188 not(target_arch = "arm"),
5189 stable(feature = "neon_intrinsics", since = "1.59.0")
5190)]
5191#[cfg_attr(
5192 target_arch = "arm",
5193 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5194)]
5195pub fn vbslq_p16(a: uint16x8_t, b: poly16x8_t, c: poly16x8_t) -> poly16x8_t {
5196 let not = int16x8_t::splat(-1);
5197 unsafe {
5198 transmute(simd_or(
5199 simd_and(a, transmute(b)),
5200 simd_and(simd_xor(a, transmute(not)), transmute(c)),
5201 ))
5202 }
5203}
5204
5205#[inline]
5207#[target_feature(enable = "neon,fp16")]
5208#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5209#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
5210#[cfg_attr(
5211 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5212 assert_instr(bsl)
5213)]
5214#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
5215pub fn vbslq_f16(a: uint16x8_t, b: float16x8_t, c: float16x8_t) -> float16x8_t {
5216 let not = int16x8_t::splat(-1);
5217 unsafe {
5218 transmute(simd_or(
5219 simd_and(a, transmute(b)),
5220 simd_and(simd_xor(a, transmute(not)), transmute(c)),
5221 ))
5222 }
5223}
5224
5225#[inline]
5227#[target_feature(enable = "neon")]
5228#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5229#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
5230#[cfg_attr(
5231 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5232 assert_instr(bsl)
5233)]
5234#[cfg_attr(
5235 not(target_arch = "arm"),
5236 stable(feature = "neon_intrinsics", since = "1.59.0")
5237)]
5238#[cfg_attr(
5239 target_arch = "arm",
5240 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5241)]
5242pub fn vbslq_f32(a: uint32x4_t, b: float32x4_t, c: float32x4_t) -> float32x4_t {
5243 let not = int32x4_t::splat(-1);
5244 unsafe {
5245 transmute(simd_or(
5246 simd_and(a, transmute(b)),
5247 simd_and(simd_xor(a, transmute(not)), transmute(c)),
5248 ))
5249 }
5250}
5251
5252#[inline]
5254#[target_feature(enable = "neon")]
5255#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5256#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorn))]
5257#[cfg_attr(
5258 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5259 assert_instr(orn)
5260)]
5261#[cfg_attr(
5262 not(target_arch = "arm"),
5263 stable(feature = "neon_intrinsics", since = "1.59.0")
5264)]
5265#[cfg_attr(
5266 target_arch = "arm",
5267 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5268)]
5269pub fn vorn_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t {
5270 let c = int8x8_t::splat(-1);
5271 unsafe { simd_or(simd_xor(b, c), a) }
5272}
5273
5274#[inline]
5276#[target_feature(enable = "neon")]
5277#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5278#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorn))]
5279#[cfg_attr(
5280 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5281 assert_instr(orn)
5282)]
5283#[cfg_attr(
5284 not(target_arch = "arm"),
5285 stable(feature = "neon_intrinsics", since = "1.59.0")
5286)]
5287#[cfg_attr(
5288 target_arch = "arm",
5289 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5290)]
5291pub fn vornq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t {
5292 let c = int8x16_t::splat(-1);
5293 unsafe { simd_or(simd_xor(b, c), a) }
5294}
5295
5296#[inline]
5298#[target_feature(enable = "neon")]
5299#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5300#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorn))]
5301#[cfg_attr(
5302 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5303 assert_instr(orn)
5304)]
5305#[cfg_attr(
5306 not(target_arch = "arm"),
5307 stable(feature = "neon_intrinsics", since = "1.59.0")
5308)]
5309#[cfg_attr(
5310 target_arch = "arm",
5311 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5312)]
5313pub fn vorn_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t {
5314 let c = int16x4_t::splat(-1);
5315 unsafe { simd_or(simd_xor(b, c), a) }
5316}
5317
5318#[inline]
5320#[target_feature(enable = "neon")]
5321#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5322#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorn))]
5323#[cfg_attr(
5324 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5325 assert_instr(orn)
5326)]
5327#[cfg_attr(
5328 not(target_arch = "arm"),
5329 stable(feature = "neon_intrinsics", since = "1.59.0")
5330)]
5331#[cfg_attr(
5332 target_arch = "arm",
5333 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5334)]
5335pub fn vornq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t {
5336 let c = int16x8_t::splat(-1);
5337 unsafe { simd_or(simd_xor(b, c), a) }
5338}
5339
5340#[inline]
5342#[target_feature(enable = "neon")]
5343#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5344#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorn))]
5345#[cfg_attr(
5346 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5347 assert_instr(orn)
5348)]
5349#[cfg_attr(
5350 not(target_arch = "arm"),
5351 stable(feature = "neon_intrinsics", since = "1.59.0")
5352)]
5353#[cfg_attr(
5354 target_arch = "arm",
5355 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5356)]
5357pub fn vorn_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t {
5358 let c = int32x2_t::splat(-1);
5359 unsafe { simd_or(simd_xor(b, c), a) }
5360}
5361
5362#[inline]
5364#[target_feature(enable = "neon")]
5365#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5366#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorn))]
5367#[cfg_attr(
5368 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5369 assert_instr(orn)
5370)]
5371#[cfg_attr(
5372 not(target_arch = "arm"),
5373 stable(feature = "neon_intrinsics", since = "1.59.0")
5374)]
5375#[cfg_attr(
5376 target_arch = "arm",
5377 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5378)]
5379pub fn vornq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t {
5380 let c = int32x4_t::splat(-1);
5381 unsafe { simd_or(simd_xor(b, c), a) }
5382}
5383
5384#[inline]
5386#[target_feature(enable = "neon")]
5387#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5388#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorn))]
5389#[cfg_attr(
5390 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5391 assert_instr(orn)
5392)]
5393#[cfg_attr(
5394 not(target_arch = "arm"),
5395 stable(feature = "neon_intrinsics", since = "1.59.0")
5396)]
5397#[cfg_attr(
5398 target_arch = "arm",
5399 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5400)]
5401pub fn vorn_s64(a: int64x1_t, b: int64x1_t) -> int64x1_t {
5402 let c = int64x1_t::splat(-1);
5403 unsafe { simd_or(simd_xor(b, c), a) }
5404}
5405
5406#[inline]
5408#[target_feature(enable = "neon")]
5409#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5410#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorn))]
5411#[cfg_attr(
5412 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5413 assert_instr(orn)
5414)]
5415#[cfg_attr(
5416 not(target_arch = "arm"),
5417 stable(feature = "neon_intrinsics", since = "1.59.0")
5418)]
5419#[cfg_attr(
5420 target_arch = "arm",
5421 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5422)]
5423pub fn vornq_s64(a: int64x2_t, b: int64x2_t) -> int64x2_t {
5424 let c = int64x2_t::splat(-1);
5425 unsafe { simd_or(simd_xor(b, c), a) }
5426}
5427
5428#[inline]
5430#[target_feature(enable = "neon")]
5431#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5432#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorn))]
5433#[cfg_attr(
5434 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5435 assert_instr(orn)
5436)]
5437#[cfg_attr(
5438 not(target_arch = "arm"),
5439 stable(feature = "neon_intrinsics", since = "1.59.0")
5440)]
5441#[cfg_attr(
5442 target_arch = "arm",
5443 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5444)]
5445pub fn vorn_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
5446 let c = int8x8_t::splat(-1);
5447 unsafe { simd_or(simd_xor(b, transmute(c)), a) }
5448}
5449
5450#[inline]
5452#[target_feature(enable = "neon")]
5453#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5454#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorn))]
5455#[cfg_attr(
5456 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5457 assert_instr(orn)
5458)]
5459#[cfg_attr(
5460 not(target_arch = "arm"),
5461 stable(feature = "neon_intrinsics", since = "1.59.0")
5462)]
5463#[cfg_attr(
5464 target_arch = "arm",
5465 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5466)]
5467pub fn vornq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t {
5468 let c = int8x16_t::splat(-1);
5469 unsafe { simd_or(simd_xor(b, transmute(c)), a) }
5470}
5471
5472#[inline]
5474#[target_feature(enable = "neon")]
5475#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5476#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorn))]
5477#[cfg_attr(
5478 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5479 assert_instr(orn)
5480)]
5481#[cfg_attr(
5482 not(target_arch = "arm"),
5483 stable(feature = "neon_intrinsics", since = "1.59.0")
5484)]
5485#[cfg_attr(
5486 target_arch = "arm",
5487 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5488)]
5489pub fn vorn_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
5490 let c = int16x4_t::splat(-1);
5491 unsafe { simd_or(simd_xor(b, transmute(c)), a) }
5492}
5493
5494#[inline]
5496#[target_feature(enable = "neon")]
5497#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5498#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorn))]
5499#[cfg_attr(
5500 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5501 assert_instr(orn)
5502)]
5503#[cfg_attr(
5504 not(target_arch = "arm"),
5505 stable(feature = "neon_intrinsics", since = "1.59.0")
5506)]
5507#[cfg_attr(
5508 target_arch = "arm",
5509 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5510)]
5511pub fn vornq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
5512 let c = int16x8_t::splat(-1);
5513 unsafe { simd_or(simd_xor(b, transmute(c)), a) }
5514}
5515
5516#[inline]
5518#[target_feature(enable = "neon")]
5519#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5520#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorn))]
5521#[cfg_attr(
5522 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5523 assert_instr(orn)
5524)]
5525#[cfg_attr(
5526 not(target_arch = "arm"),
5527 stable(feature = "neon_intrinsics", since = "1.59.0")
5528)]
5529#[cfg_attr(
5530 target_arch = "arm",
5531 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5532)]
5533pub fn vorn_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
5534 let c = int32x2_t::splat(-1);
5535 unsafe { simd_or(simd_xor(b, transmute(c)), a) }
5536}
5537
5538#[inline]
5540#[target_feature(enable = "neon")]
5541#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5542#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorn))]
5543#[cfg_attr(
5544 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5545 assert_instr(orn)
5546)]
5547#[cfg_attr(
5548 not(target_arch = "arm"),
5549 stable(feature = "neon_intrinsics", since = "1.59.0")
5550)]
5551#[cfg_attr(
5552 target_arch = "arm",
5553 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5554)]
5555pub fn vornq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
5556 let c = int32x4_t::splat(-1);
5557 unsafe { simd_or(simd_xor(b, transmute(c)), a) }
5558}
5559
5560#[inline]
5562#[target_feature(enable = "neon")]
5563#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5564#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorn))]
5565#[cfg_attr(
5566 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5567 assert_instr(orn)
5568)]
5569#[cfg_attr(
5570 not(target_arch = "arm"),
5571 stable(feature = "neon_intrinsics", since = "1.59.0")
5572)]
5573#[cfg_attr(
5574 target_arch = "arm",
5575 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5576)]
5577pub fn vorn_u64(a: uint64x1_t, b: uint64x1_t) -> uint64x1_t {
5578 let c = int64x1_t::splat(-1);
5579 unsafe { simd_or(simd_xor(b, transmute(c)), a) }
5580}
5581
5582#[inline]
5584#[target_feature(enable = "neon")]
5585#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5586#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorn))]
5587#[cfg_attr(
5588 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5589 assert_instr(orn)
5590)]
5591#[cfg_attr(
5592 not(target_arch = "arm"),
5593 stable(feature = "neon_intrinsics", since = "1.59.0")
5594)]
5595#[cfg_attr(
5596 target_arch = "arm",
5597 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5598)]
5599pub fn vornq_u64(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t {
5600 let c = int64x2_t::splat(-1);
5601 unsafe { simd_or(simd_xor(b, transmute(c)), a) }
5602}
5603
5604#[inline]
5606#[target_feature(enable = "neon")]
5607#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5608#[rustc_legacy_const_generics(1)]
5609#[cfg_attr(test, assert_instr(nop, IMM5 = 1))]
5610#[cfg_attr(
5611 not(target_arch = "arm"),
5612 stable(feature = "neon_intrinsics", since = "1.59.0")
5613)]
5614#[cfg_attr(
5615 target_arch = "arm",
5616 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5617)]
5618pub fn vgetq_lane_u64<const IMM5: i32>(v: uint64x2_t) -> u64 {
5619 static_assert_uimm_bits!(IMM5, 1);
5620 unsafe { simd_extract!(v, IMM5 as u32) }
5621}
5622
5623#[inline]
5625#[target_feature(enable = "neon")]
5626#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5627#[rustc_legacy_const_generics(1)]
5628#[cfg_attr(test, assert_instr(nop, IMM5 = 0))]
5629#[cfg_attr(
5630 not(target_arch = "arm"),
5631 stable(feature = "neon_intrinsics", since = "1.59.0")
5632)]
5633#[cfg_attr(
5634 target_arch = "arm",
5635 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5636)]
5637pub fn vget_lane_u64<const IMM5: i32>(v: uint64x1_t) -> u64 {
5638 static_assert!(IMM5 == 0);
5639 unsafe { simd_extract!(v, 0) }
5640}
5641
5642#[inline]
5644#[target_feature(enable = "neon")]
5645#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5646#[rustc_legacy_const_generics(1)]
5647#[cfg_attr(test, assert_instr(nop, IMM5 = 2))]
5648#[cfg_attr(
5649 not(target_arch = "arm"),
5650 stable(feature = "neon_intrinsics", since = "1.59.0")
5651)]
5652#[cfg_attr(
5653 target_arch = "arm",
5654 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5655)]
5656pub fn vget_lane_u16<const IMM5: i32>(v: uint16x4_t) -> u16 {
5657 static_assert_uimm_bits!(IMM5, 2);
5658 unsafe { simd_extract!(v, IMM5 as u32) }
5659}
5660
5661#[inline]
5663#[target_feature(enable = "neon")]
5664#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5665#[rustc_legacy_const_generics(1)]
5666#[cfg_attr(test, assert_instr(nop, IMM5 = 2))]
5667#[cfg_attr(
5668 not(target_arch = "arm"),
5669 stable(feature = "neon_intrinsics", since = "1.59.0")
5670)]
5671#[cfg_attr(
5672 target_arch = "arm",
5673 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5674)]
5675pub fn vget_lane_s16<const IMM5: i32>(v: int16x4_t) -> i16 {
5676 static_assert_uimm_bits!(IMM5, 2);
5677 unsafe { simd_extract!(v, IMM5 as u32) }
5678}
5679
5680#[inline]
5682#[target_feature(enable = "neon")]
5683#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5684#[rustc_legacy_const_generics(1)]
5685#[cfg_attr(test, assert_instr(nop, IMM5 = 2))]
5686#[cfg_attr(
5687 not(target_arch = "arm"),
5688 stable(feature = "neon_intrinsics", since = "1.59.0")
5689)]
5690#[cfg_attr(
5691 target_arch = "arm",
5692 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5693)]
5694pub fn vget_lane_p16<const IMM5: i32>(v: poly16x4_t) -> p16 {
5695 static_assert_uimm_bits!(IMM5, 2);
5696 unsafe { simd_extract!(v, IMM5 as u32) }
5697}
5698
5699#[inline]
5701#[target_feature(enable = "neon")]
5702#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5703#[rustc_legacy_const_generics(1)]
5704#[cfg_attr(test, assert_instr(nop, IMM5 = 1))]
5705#[cfg_attr(
5706 not(target_arch = "arm"),
5707 stable(feature = "neon_intrinsics", since = "1.59.0")
5708)]
5709#[cfg_attr(
5710 target_arch = "arm",
5711 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5712)]
5713pub fn vget_lane_u32<const IMM5: i32>(v: uint32x2_t) -> u32 {
5714 static_assert_uimm_bits!(IMM5, 1);
5715 unsafe { simd_extract!(v, IMM5 as u32) }
5716}
5717
5718#[inline]
5720#[target_feature(enable = "neon")]
5721#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5722#[rustc_legacy_const_generics(1)]
5723#[cfg_attr(test, assert_instr(nop, IMM5 = 1))]
5724#[cfg_attr(
5725 not(target_arch = "arm"),
5726 stable(feature = "neon_intrinsics", since = "1.59.0")
5727)]
5728#[cfg_attr(
5729 target_arch = "arm",
5730 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5731)]
5732pub fn vget_lane_s32<const IMM5: i32>(v: int32x2_t) -> i32 {
5733 static_assert_uimm_bits!(IMM5, 1);
5734 unsafe { simd_extract!(v, IMM5 as u32) }
5735}
5736
5737#[inline]
5739#[target_feature(enable = "neon")]
5740#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5741#[rustc_legacy_const_generics(1)]
5742#[cfg_attr(test, assert_instr(nop, IMM5 = 1))]
5743#[cfg_attr(
5744 not(target_arch = "arm"),
5745 stable(feature = "neon_intrinsics", since = "1.59.0")
5746)]
5747#[cfg_attr(
5748 target_arch = "arm",
5749 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5750)]
5751pub fn vget_lane_f32<const IMM5: i32>(v: float32x2_t) -> f32 {
5752 static_assert_uimm_bits!(IMM5, 1);
5753 unsafe { simd_extract!(v, IMM5 as u32) }
5754}
5755
5756#[inline]
5758#[target_feature(enable = "neon")]
5759#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5760#[rustc_legacy_const_generics(1)]
5761#[cfg_attr(test, assert_instr(nop, IMM5 = 1))]
5762#[cfg_attr(
5763 not(target_arch = "arm"),
5764 stable(feature = "neon_intrinsics", since = "1.59.0")
5765)]
5766#[cfg_attr(
5767 target_arch = "arm",
5768 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5769)]
5770pub fn vgetq_lane_f32<const IMM5: i32>(v: float32x4_t) -> f32 {
5771 static_assert_uimm_bits!(IMM5, 2);
5772 unsafe { simd_extract!(v, IMM5 as u32) }
5773}
5774
5775#[inline]
5777#[target_feature(enable = "neon")]
5778#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5779#[rustc_legacy_const_generics(1)]
5780#[cfg_attr(test, assert_instr(nop, IMM5 = 0))]
5781#[cfg_attr(
5782 not(target_arch = "arm"),
5783 stable(feature = "neon_intrinsics", since = "1.59.0")
5784)]
5785#[cfg_attr(
5786 target_arch = "arm",
5787 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5788)]
5789pub fn vget_lane_p64<const IMM5: i32>(v: poly64x1_t) -> p64 {
5790 static_assert!(IMM5 == 0);
5791 unsafe { simd_extract!(v, IMM5 as u32) }
5792}
5793
5794#[inline]
5796#[target_feature(enable = "neon")]
5797#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5798#[rustc_legacy_const_generics(1)]
5799#[cfg_attr(test, assert_instr(nop, IMM5 = 0))]
5800#[cfg_attr(
5801 not(target_arch = "arm"),
5802 stable(feature = "neon_intrinsics", since = "1.59.0")
5803)]
5804#[cfg_attr(
5805 target_arch = "arm",
5806 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5807)]
5808pub fn vgetq_lane_p64<const IMM5: i32>(v: poly64x2_t) -> p64 {
5809 static_assert_uimm_bits!(IMM5, 1);
5810 unsafe { simd_extract!(v, IMM5 as u32) }
5811}
5812
5813#[inline]
5815#[target_feature(enable = "neon")]
5816#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5817#[rustc_legacy_const_generics(1)]
5818#[cfg_attr(test, assert_instr(nop, IMM5 = 0))]
5819#[cfg_attr(
5820 not(target_arch = "arm"),
5821 stable(feature = "neon_intrinsics", since = "1.59.0")
5822)]
5823#[cfg_attr(
5824 target_arch = "arm",
5825 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5826)]
5827pub fn vget_lane_s64<const IMM5: i32>(v: int64x1_t) -> i64 {
5828 static_assert!(IMM5 == 0);
5829 unsafe { simd_extract!(v, IMM5 as u32) }
5830}
5831
5832#[inline]
5834#[target_feature(enable = "neon")]
5835#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5836#[rustc_legacy_const_generics(1)]
5837#[cfg_attr(test, assert_instr(nop, IMM5 = 0))]
5838#[cfg_attr(
5839 not(target_arch = "arm"),
5840 stable(feature = "neon_intrinsics", since = "1.59.0")
5841)]
5842#[cfg_attr(
5843 target_arch = "arm",
5844 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5845)]
5846pub fn vgetq_lane_s64<const IMM5: i32>(v: int64x2_t) -> i64 {
5847 static_assert_uimm_bits!(IMM5, 1);
5848 unsafe { simd_extract!(v, IMM5 as u32) }
5849}
5850
5851#[inline]
5853#[target_feature(enable = "neon")]
5854#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5855#[rustc_legacy_const_generics(1)]
5856#[cfg_attr(test, assert_instr(nop, IMM5 = 2))]
5857#[cfg_attr(
5858 not(target_arch = "arm"),
5859 stable(feature = "neon_intrinsics", since = "1.59.0")
5860)]
5861#[cfg_attr(
5862 target_arch = "arm",
5863 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5864)]
5865pub fn vgetq_lane_u16<const IMM5: i32>(v: uint16x8_t) -> u16 {
5866 static_assert_uimm_bits!(IMM5, 3);
5867 unsafe { simd_extract!(v, IMM5 as u32) }
5868}
5869
5870#[inline]
5872#[target_feature(enable = "neon")]
5873#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5874#[rustc_legacy_const_generics(1)]
5875#[cfg_attr(test, assert_instr(nop, IMM5 = 2))]
5876#[cfg_attr(
5877 not(target_arch = "arm"),
5878 stable(feature = "neon_intrinsics", since = "1.59.0")
5879)]
5880#[cfg_attr(
5881 target_arch = "arm",
5882 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5883)]
5884pub fn vgetq_lane_u32<const IMM5: i32>(v: uint32x4_t) -> u32 {
5885 static_assert_uimm_bits!(IMM5, 2);
5886 unsafe { simd_extract!(v, IMM5 as u32) }
5887}
5888
5889#[inline]
5891#[target_feature(enable = "neon")]
5892#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5893#[rustc_legacy_const_generics(1)]
5894#[cfg_attr(test, assert_instr(nop, IMM5 = 2))]
5895#[cfg_attr(
5896 not(target_arch = "arm"),
5897 stable(feature = "neon_intrinsics", since = "1.59.0")
5898)]
5899#[cfg_attr(
5900 target_arch = "arm",
5901 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5902)]
5903pub fn vgetq_lane_s16<const IMM5: i32>(v: int16x8_t) -> i16 {
5904 static_assert_uimm_bits!(IMM5, 3);
5905 unsafe { simd_extract!(v, IMM5 as u32) }
5906}
5907
5908#[inline]
5910#[target_feature(enable = "neon")]
5911#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5912#[rustc_legacy_const_generics(1)]
5913#[cfg_attr(test, assert_instr(nop, IMM5 = 2))]
5914#[cfg_attr(
5915 not(target_arch = "arm"),
5916 stable(feature = "neon_intrinsics", since = "1.59.0")
5917)]
5918#[cfg_attr(
5919 target_arch = "arm",
5920 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5921)]
5922pub fn vgetq_lane_p16<const IMM5: i32>(v: poly16x8_t) -> p16 {
5923 static_assert_uimm_bits!(IMM5, 3);
5924 unsafe { simd_extract!(v, IMM5 as u32) }
5925}
5926
5927#[inline]
5929#[target_feature(enable = "neon")]
5930#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5931#[rustc_legacy_const_generics(1)]
5932#[cfg_attr(test, assert_instr(nop, IMM5 = 2))]
5933#[cfg_attr(
5934 not(target_arch = "arm"),
5935 stable(feature = "neon_intrinsics", since = "1.59.0")
5936)]
5937#[cfg_attr(
5938 target_arch = "arm",
5939 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5940)]
5941pub fn vgetq_lane_s32<const IMM5: i32>(v: int32x4_t) -> i32 {
5942 static_assert_uimm_bits!(IMM5, 2);
5943 unsafe { simd_extract!(v, IMM5 as u32) }
5944}
5945
5946#[inline]
5948#[target_feature(enable = "neon")]
5949#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5950#[rustc_legacy_const_generics(1)]
5951#[cfg_attr(test, assert_instr(nop, IMM5 = 2))]
5952#[cfg_attr(
5953 not(target_arch = "arm"),
5954 stable(feature = "neon_intrinsics", since = "1.59.0")
5955)]
5956#[cfg_attr(
5957 target_arch = "arm",
5958 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5959)]
5960pub fn vget_lane_u8<const IMM5: i32>(v: uint8x8_t) -> u8 {
5961 static_assert_uimm_bits!(IMM5, 3);
5962 unsafe { simd_extract!(v, IMM5 as u32) }
5963}
5964
5965#[inline]
5967#[target_feature(enable = "neon")]
5968#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5969#[rustc_legacy_const_generics(1)]
5970#[cfg_attr(test, assert_instr(nop, IMM5 = 2))]
5971#[cfg_attr(
5972 not(target_arch = "arm"),
5973 stable(feature = "neon_intrinsics", since = "1.59.0")
5974)]
5975#[cfg_attr(
5976 target_arch = "arm",
5977 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5978)]
5979pub fn vget_lane_s8<const IMM5: i32>(v: int8x8_t) -> i8 {
5980 static_assert_uimm_bits!(IMM5, 3);
5981 unsafe { simd_extract!(v, IMM5 as u32) }
5982}
5983
5984#[inline]
5986#[target_feature(enable = "neon")]
5987#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5988#[rustc_legacy_const_generics(1)]
5989#[cfg_attr(test, assert_instr(nop, IMM5 = 2))]
5990#[cfg_attr(
5991 not(target_arch = "arm"),
5992 stable(feature = "neon_intrinsics", since = "1.59.0")
5993)]
5994#[cfg_attr(
5995 target_arch = "arm",
5996 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5997)]
5998pub fn vget_lane_p8<const IMM5: i32>(v: poly8x8_t) -> p8 {
5999 static_assert_uimm_bits!(IMM5, 3);
6000 unsafe { simd_extract!(v, IMM5 as u32) }
6001}
6002
6003#[inline]
6005#[target_feature(enable = "neon")]
6006#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6007#[rustc_legacy_const_generics(1)]
6008#[cfg_attr(test, assert_instr(nop, IMM5 = 2))]
6009#[cfg_attr(
6010 not(target_arch = "arm"),
6011 stable(feature = "neon_intrinsics", since = "1.59.0")
6012)]
6013#[cfg_attr(
6014 target_arch = "arm",
6015 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6016)]
6017pub fn vgetq_lane_u8<const IMM5: i32>(v: uint8x16_t) -> u8 {
6018 static_assert_uimm_bits!(IMM5, 4);
6019 unsafe { simd_extract!(v, IMM5 as u32) }
6020}
6021
6022#[inline]
6024#[target_feature(enable = "neon")]
6025#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6026#[rustc_legacy_const_generics(1)]
6027#[cfg_attr(test, assert_instr(nop, IMM5 = 2))]
6028#[cfg_attr(
6029 not(target_arch = "arm"),
6030 stable(feature = "neon_intrinsics", since = "1.59.0")
6031)]
6032#[cfg_attr(
6033 target_arch = "arm",
6034 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6035)]
6036pub fn vgetq_lane_s8<const IMM5: i32>(v: int8x16_t) -> i8 {
6037 static_assert_uimm_bits!(IMM5, 4);
6038 unsafe { simd_extract!(v, IMM5 as u32) }
6039}
6040
6041#[inline]
6043#[target_feature(enable = "neon")]
6044#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6045#[rustc_legacy_const_generics(1)]
6046#[cfg_attr(test, assert_instr(nop, IMM5 = 2))]
6047#[cfg_attr(
6048 not(target_arch = "arm"),
6049 stable(feature = "neon_intrinsics", since = "1.59.0")
6050)]
6051#[cfg_attr(
6052 target_arch = "arm",
6053 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6054)]
6055pub fn vgetq_lane_p8<const IMM5: i32>(v: poly8x16_t) -> p8 {
6056 static_assert_uimm_bits!(IMM5, 4);
6057 unsafe { simd_extract!(v, IMM5 as u32) }
6058}
6059
6060#[inline]
6062#[target_feature(enable = "neon")]
6063#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6064#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
6065#[cfg_attr(
6066 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6067 assert_instr(ext)
6068)]
6069#[cfg_attr(
6070 not(target_arch = "arm"),
6071 stable(feature = "neon_intrinsics", since = "1.59.0")
6072)]
6073#[cfg_attr(
6074 target_arch = "arm",
6075 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6076)]
6077pub fn vget_high_s8(a: int8x16_t) -> int8x8_t {
6078 unsafe { simd_shuffle!(a, a, [8, 9, 10, 11, 12, 13, 14, 15]) }
6079}
6080
6081#[inline]
6083#[target_feature(enable = "neon")]
6084#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6085#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
6086#[cfg_attr(
6087 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6088 assert_instr(ext)
6089)]
6090#[cfg_attr(
6091 not(target_arch = "arm"),
6092 stable(feature = "neon_intrinsics", since = "1.59.0")
6093)]
6094#[cfg_attr(
6095 target_arch = "arm",
6096 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6097)]
6098pub fn vget_high_s16(a: int16x8_t) -> int16x4_t {
6099 unsafe { simd_shuffle!(a, a, [4, 5, 6, 7]) }
6100}
6101
6102#[inline]
6104#[target_feature(enable = "neon")]
6105#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6106#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
6107#[cfg_attr(
6108 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6109 assert_instr(ext)
6110)]
6111#[cfg_attr(
6112 not(target_arch = "arm"),
6113 stable(feature = "neon_intrinsics", since = "1.59.0")
6114)]
6115#[cfg_attr(
6116 target_arch = "arm",
6117 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6118)]
6119pub fn vget_high_s32(a: int32x4_t) -> int32x2_t {
6120 unsafe { simd_shuffle!(a, a, [2, 3]) }
6121}
6122
6123#[inline]
6125#[target_feature(enable = "neon")]
6126#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6127#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
6128#[cfg_attr(
6129 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6130 assert_instr(ext)
6131)]
6132#[cfg_attr(
6133 not(target_arch = "arm"),
6134 stable(feature = "neon_intrinsics", since = "1.59.0")
6135)]
6136#[cfg_attr(
6137 target_arch = "arm",
6138 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6139)]
6140pub fn vget_high_s64(a: int64x2_t) -> int64x1_t {
6141 unsafe { int64x1_t([simd_extract!(a, 1)]) }
6142}
6143
6144#[inline]
6146#[target_feature(enable = "neon")]
6147#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6148#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
6149#[cfg_attr(
6150 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6151 assert_instr(ext)
6152)]
6153#[cfg_attr(
6154 not(target_arch = "arm"),
6155 stable(feature = "neon_intrinsics", since = "1.59.0")
6156)]
6157#[cfg_attr(
6158 target_arch = "arm",
6159 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6160)]
6161pub fn vget_high_u8(a: uint8x16_t) -> uint8x8_t {
6162 unsafe { simd_shuffle!(a, a, [8, 9, 10, 11, 12, 13, 14, 15]) }
6163}
6164
6165#[inline]
6167#[target_feature(enable = "neon")]
6168#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6169#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
6170#[cfg_attr(
6171 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6172 assert_instr(ext)
6173)]
6174#[cfg_attr(
6175 not(target_arch = "arm"),
6176 stable(feature = "neon_intrinsics", since = "1.59.0")
6177)]
6178#[cfg_attr(
6179 target_arch = "arm",
6180 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6181)]
6182pub fn vget_high_u16(a: uint16x8_t) -> uint16x4_t {
6183 unsafe { simd_shuffle!(a, a, [4, 5, 6, 7]) }
6184}
6185
6186#[inline]
6188#[target_feature(enable = "neon")]
6189#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6190#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
6191#[cfg_attr(
6192 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6193 assert_instr(ext)
6194)]
6195#[cfg_attr(
6196 not(target_arch = "arm"),
6197 stable(feature = "neon_intrinsics", since = "1.59.0")
6198)]
6199#[cfg_attr(
6200 target_arch = "arm",
6201 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6202)]
6203pub fn vget_high_u32(a: uint32x4_t) -> uint32x2_t {
6204 unsafe { simd_shuffle!(a, a, [2, 3]) }
6205}
6206
6207#[inline]
6209#[target_feature(enable = "neon")]
6210#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6211#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
6212#[cfg_attr(
6213 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6214 assert_instr(ext)
6215)]
6216#[cfg_attr(
6217 not(target_arch = "arm"),
6218 stable(feature = "neon_intrinsics", since = "1.59.0")
6219)]
6220#[cfg_attr(
6221 target_arch = "arm",
6222 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6223)]
6224pub fn vget_high_u64(a: uint64x2_t) -> uint64x1_t {
6225 unsafe { uint64x1_t([simd_extract!(a, 1)]) }
6226}
6227
6228#[inline]
6230#[target_feature(enable = "neon")]
6231#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6232#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
6233#[cfg_attr(
6234 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6235 assert_instr(ext)
6236)]
6237#[cfg_attr(
6238 not(target_arch = "arm"),
6239 stable(feature = "neon_intrinsics", since = "1.59.0")
6240)]
6241#[cfg_attr(
6242 target_arch = "arm",
6243 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6244)]
6245pub fn vget_high_p8(a: poly8x16_t) -> poly8x8_t {
6246 unsafe { simd_shuffle!(a, a, [8, 9, 10, 11, 12, 13, 14, 15]) }
6247}
6248
6249#[inline]
6251#[target_feature(enable = "neon")]
6252#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6253#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
6254#[cfg_attr(
6255 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6256 assert_instr(ext)
6257)]
6258#[cfg_attr(
6259 not(target_arch = "arm"),
6260 stable(feature = "neon_intrinsics", since = "1.59.0")
6261)]
6262#[cfg_attr(
6263 target_arch = "arm",
6264 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6265)]
6266pub fn vget_high_p16(a: poly16x8_t) -> poly16x4_t {
6267 unsafe { simd_shuffle!(a, a, [4, 5, 6, 7]) }
6268}
6269
6270#[inline]
6272#[target_feature(enable = "neon")]
6273#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6274#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
6275#[cfg_attr(
6276 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6277 assert_instr(ext)
6278)]
6279#[cfg_attr(
6280 not(target_arch = "arm"),
6281 stable(feature = "neon_intrinsics", since = "1.59.0")
6282)]
6283#[cfg_attr(
6284 target_arch = "arm",
6285 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6286)]
6287pub fn vget_high_f32(a: float32x4_t) -> float32x2_t {
6288 unsafe { simd_shuffle!(a, a, [2, 3]) }
6289}
6290
6291#[inline]
6293#[target_feature(enable = "neon")]
6294#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6295#[cfg_attr(test, assert_instr(nop))]
6296#[cfg_attr(
6297 not(target_arch = "arm"),
6298 stable(feature = "vget_low_s8", since = "1.60.0")
6299)]
6300#[cfg_attr(
6301 target_arch = "arm",
6302 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6303)]
6304pub fn vget_low_s8(a: int8x16_t) -> int8x8_t {
6305 unsafe { simd_shuffle!(a, a, [0, 1, 2, 3, 4, 5, 6, 7]) }
6306}
6307
6308#[inline]
6310#[target_feature(enable = "neon")]
6311#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6312#[cfg_attr(test, assert_instr(nop))]
6313#[cfg_attr(
6314 not(target_arch = "arm"),
6315 stable(feature = "neon_intrinsics", since = "1.59.0")
6316)]
6317#[cfg_attr(
6318 target_arch = "arm",
6319 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6320)]
6321pub fn vget_low_s16(a: int16x8_t) -> int16x4_t {
6322 unsafe { simd_shuffle!(a, a, [0, 1, 2, 3]) }
6323}
6324
6325#[inline]
6327#[target_feature(enable = "neon")]
6328#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6329#[cfg_attr(test, assert_instr(nop))]
6330#[cfg_attr(
6331 not(target_arch = "arm"),
6332 stable(feature = "neon_intrinsics", since = "1.59.0")
6333)]
6334#[cfg_attr(
6335 target_arch = "arm",
6336 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6337)]
6338pub fn vget_low_s32(a: int32x4_t) -> int32x2_t {
6339 unsafe { simd_shuffle!(a, a, [0, 1]) }
6340}
6341
6342#[inline]
6344#[target_feature(enable = "neon")]
6345#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6346#[cfg_attr(test, assert_instr(nop))]
6347#[cfg_attr(
6348 not(target_arch = "arm"),
6349 stable(feature = "neon_intrinsics", since = "1.59.0")
6350)]
6351#[cfg_attr(
6352 target_arch = "arm",
6353 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6354)]
6355pub fn vget_low_s64(a: int64x2_t) -> int64x1_t {
6356 unsafe { int64x1_t([simd_extract!(a, 0)]) }
6357}
6358
6359#[inline]
6361#[target_feature(enable = "neon")]
6362#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6363#[cfg_attr(test, assert_instr(nop))]
6364#[cfg_attr(
6365 not(target_arch = "arm"),
6366 stable(feature = "neon_intrinsics", since = "1.59.0")
6367)]
6368#[cfg_attr(
6369 target_arch = "arm",
6370 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6371)]
6372pub fn vget_low_u8(a: uint8x16_t) -> uint8x8_t {
6373 unsafe { simd_shuffle!(a, a, [0, 1, 2, 3, 4, 5, 6, 7]) }
6374}
6375
6376#[inline]
6378#[target_feature(enable = "neon")]
6379#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6380#[cfg_attr(test, assert_instr(nop))]
6381#[cfg_attr(
6382 not(target_arch = "arm"),
6383 stable(feature = "neon_intrinsics", since = "1.59.0")
6384)]
6385#[cfg_attr(
6386 target_arch = "arm",
6387 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6388)]
6389pub fn vget_low_u16(a: uint16x8_t) -> uint16x4_t {
6390 unsafe { simd_shuffle!(a, a, [0, 1, 2, 3]) }
6391}
6392
6393#[inline]
6395#[target_feature(enable = "neon")]
6396#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6397#[cfg_attr(test, assert_instr(nop))]
6398#[cfg_attr(
6399 not(target_arch = "arm"),
6400 stable(feature = "neon_intrinsics", since = "1.59.0")
6401)]
6402#[cfg_attr(
6403 target_arch = "arm",
6404 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6405)]
6406pub fn vget_low_u32(a: uint32x4_t) -> uint32x2_t {
6407 unsafe { simd_shuffle!(a, a, [0, 1]) }
6408}
6409
6410#[inline]
6412#[target_feature(enable = "neon")]
6413#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6414#[cfg_attr(test, assert_instr(nop))]
6415#[cfg_attr(
6416 not(target_arch = "arm"),
6417 stable(feature = "neon_intrinsics", since = "1.59.0")
6418)]
6419#[cfg_attr(
6420 target_arch = "arm",
6421 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6422)]
6423pub fn vget_low_u64(a: uint64x2_t) -> uint64x1_t {
6424 unsafe { uint64x1_t([simd_extract!(a, 0)]) }
6425}
6426
6427#[inline]
6429#[target_feature(enable = "neon")]
6430#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6431#[cfg_attr(test, assert_instr(nop))]
6432#[cfg_attr(
6433 not(target_arch = "arm"),
6434 stable(feature = "neon_intrinsics", since = "1.59.0")
6435)]
6436#[cfg_attr(
6437 target_arch = "arm",
6438 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6439)]
6440pub fn vget_low_p8(a: poly8x16_t) -> poly8x8_t {
6441 unsafe { simd_shuffle!(a, a, [0, 1, 2, 3, 4, 5, 6, 7]) }
6442}
6443
6444#[inline]
6446#[target_feature(enable = "neon")]
6447#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6448#[cfg_attr(test, assert_instr(nop))]
6449#[cfg_attr(
6450 not(target_arch = "arm"),
6451 stable(feature = "neon_intrinsics", since = "1.59.0")
6452)]
6453#[cfg_attr(
6454 target_arch = "arm",
6455 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6456)]
6457pub fn vget_low_p16(a: poly16x8_t) -> poly16x4_t {
6458 unsafe { simd_shuffle!(a, a, [0, 1, 2, 3]) }
6459}
6460
6461#[inline]
6463#[target_feature(enable = "neon")]
6464#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6465#[cfg_attr(test, assert_instr(nop))]
6466#[cfg_attr(
6467 not(target_arch = "arm"),
6468 stable(feature = "neon_intrinsics", since = "1.59.0")
6469)]
6470#[cfg_attr(
6471 target_arch = "arm",
6472 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6473)]
6474pub fn vget_low_f32(a: float32x4_t) -> float32x2_t {
6475 unsafe { simd_shuffle!(a, a, [0, 1]) }
6476}
6477
6478#[inline]
6480#[target_feature(enable = "neon")]
6481#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6482#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.8"))]
6483#[cfg_attr(
6484 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6485 assert_instr(dup)
6486)]
6487#[cfg_attr(
6488 not(target_arch = "arm"),
6489 stable(feature = "neon_intrinsics", since = "1.59.0")
6490)]
6491#[cfg_attr(
6492 target_arch = "arm",
6493 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6494)]
6495pub fn vdupq_n_s8(value: i8) -> int8x16_t {
6496 int8x16_t::splat(value)
6497}
6498
6499#[inline]
6501#[target_feature(enable = "neon")]
6502#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6503#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16"))]
6504#[cfg_attr(
6505 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6506 assert_instr(dup)
6507)]
6508#[cfg_attr(
6509 not(target_arch = "arm"),
6510 stable(feature = "neon_intrinsics", since = "1.59.0")
6511)]
6512#[cfg_attr(
6513 target_arch = "arm",
6514 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6515)]
6516pub fn vdupq_n_s16(value: i16) -> int16x8_t {
6517 int16x8_t::splat(value)
6518}
6519
6520#[inline]
6522#[target_feature(enable = "neon")]
6523#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6524#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.32"))]
6525#[cfg_attr(
6526 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6527 assert_instr(dup)
6528)]
6529#[cfg_attr(
6530 not(target_arch = "arm"),
6531 stable(feature = "neon_intrinsics", since = "1.59.0")
6532)]
6533#[cfg_attr(
6534 target_arch = "arm",
6535 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6536)]
6537pub fn vdupq_n_s32(value: i32) -> int32x4_t {
6538 int32x4_t::splat(value)
6539}
6540
6541#[inline]
6543#[target_feature(enable = "neon")]
6544#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6545#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
6546#[cfg_attr(
6547 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6548 assert_instr(dup)
6549)]
6550#[cfg_attr(
6551 not(target_arch = "arm"),
6552 stable(feature = "neon_intrinsics", since = "1.59.0")
6553)]
6554#[cfg_attr(
6555 target_arch = "arm",
6556 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6557)]
6558pub fn vdupq_n_s64(value: i64) -> int64x2_t {
6559 int64x2_t::splat(value)
6560}
6561
6562#[inline]
6564#[target_feature(enable = "neon")]
6565#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6566#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.8"))]
6567#[cfg_attr(
6568 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6569 assert_instr(dup)
6570)]
6571#[cfg_attr(
6572 not(target_arch = "arm"),
6573 stable(feature = "neon_intrinsics", since = "1.59.0")
6574)]
6575#[cfg_attr(
6576 target_arch = "arm",
6577 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6578)]
6579pub fn vdupq_n_u8(value: u8) -> uint8x16_t {
6580 uint8x16_t::splat(value)
6581}
6582
6583#[inline]
6585#[target_feature(enable = "neon")]
6586#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6587#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16"))]
6588#[cfg_attr(
6589 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6590 assert_instr(dup)
6591)]
6592#[cfg_attr(
6593 not(target_arch = "arm"),
6594 stable(feature = "neon_intrinsics", since = "1.59.0")
6595)]
6596#[cfg_attr(
6597 target_arch = "arm",
6598 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6599)]
6600pub fn vdupq_n_u16(value: u16) -> uint16x8_t {
6601 uint16x8_t::splat(value)
6602}
6603
6604#[inline]
6606#[target_feature(enable = "neon")]
6607#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6608#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.32"))]
6609#[cfg_attr(
6610 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6611 assert_instr(dup)
6612)]
6613#[cfg_attr(
6614 not(target_arch = "arm"),
6615 stable(feature = "neon_intrinsics", since = "1.59.0")
6616)]
6617#[cfg_attr(
6618 target_arch = "arm",
6619 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6620)]
6621pub fn vdupq_n_u32(value: u32) -> uint32x4_t {
6622 uint32x4_t::splat(value)
6623}
6624
6625#[inline]
6627#[target_feature(enable = "neon")]
6628#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6629#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
6630#[cfg_attr(
6631 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6632 assert_instr(dup)
6633)]
6634#[cfg_attr(
6635 not(target_arch = "arm"),
6636 stable(feature = "neon_intrinsics", since = "1.59.0")
6637)]
6638#[cfg_attr(
6639 target_arch = "arm",
6640 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6641)]
6642pub fn vdupq_n_u64(value: u64) -> uint64x2_t {
6643 uint64x2_t::splat(value)
6644}
6645
6646#[inline]
6648#[target_feature(enable = "neon")]
6649#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6650#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.8"))]
6651#[cfg_attr(
6652 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6653 assert_instr(dup)
6654)]
6655#[cfg_attr(
6656 not(target_arch = "arm"),
6657 stable(feature = "neon_intrinsics", since = "1.59.0")
6658)]
6659#[cfg_attr(
6660 target_arch = "arm",
6661 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6662)]
6663pub fn vdupq_n_p8(value: p8) -> poly8x16_t {
6664 poly8x16_t::splat(value)
6665}
6666
6667#[inline]
6669#[target_feature(enable = "neon")]
6670#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6671#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16"))]
6672#[cfg_attr(
6673 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6674 assert_instr(dup)
6675)]
6676#[cfg_attr(
6677 not(target_arch = "arm"),
6678 stable(feature = "neon_intrinsics", since = "1.59.0")
6679)]
6680#[cfg_attr(
6681 target_arch = "arm",
6682 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6683)]
6684pub fn vdupq_n_p16(value: p16) -> poly16x8_t {
6685 poly16x8_t::splat(value)
6686}
6687
6688#[inline]
6690#[target_feature(enable = "neon")]
6691#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6692#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.32"))]
6693#[cfg_attr(
6694 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6695 assert_instr(dup)
6696)]
6697#[cfg_attr(
6698 not(target_arch = "arm"),
6699 stable(feature = "neon_intrinsics", since = "1.59.0")
6700)]
6701#[cfg_attr(
6702 target_arch = "arm",
6703 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6704)]
6705pub fn vdupq_n_f32(value: f32) -> float32x4_t {
6706 float32x4_t::splat(value)
6707}
6708
6709#[inline]
6714#[target_feature(enable = "neon")]
6715#[cfg_attr(target_arch = "arm", target_feature(enable = "vfp4"))]
6716#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.32"))]
6717#[cfg_attr(
6718 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6719 assert_instr(dup)
6720)]
6721#[cfg_attr(
6722 not(target_arch = "arm"),
6723 stable(feature = "neon_intrinsics", since = "1.59.0")
6724)]
6725fn vdupq_n_f32_vfp4(value: f32) -> float32x4_t {
6726 float32x4_t::splat(value)
6727}
6728
6729#[inline]
6731#[target_feature(enable = "neon")]
6732#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6733#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.8"))]
6734#[cfg_attr(
6735 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6736 assert_instr(dup)
6737)]
6738#[cfg_attr(
6739 not(target_arch = "arm"),
6740 stable(feature = "neon_intrinsics", since = "1.59.0")
6741)]
6742#[cfg_attr(
6743 target_arch = "arm",
6744 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6745)]
6746pub fn vdup_n_s8(value: i8) -> int8x8_t {
6747 int8x8_t::splat(value)
6748}
6749
6750#[inline]
6752#[target_feature(enable = "neon")]
6753#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6754#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16"))]
6755#[cfg_attr(
6756 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6757 assert_instr(dup)
6758)]
6759#[cfg_attr(
6760 not(target_arch = "arm"),
6761 stable(feature = "neon_intrinsics", since = "1.59.0")
6762)]
6763#[cfg_attr(
6764 target_arch = "arm",
6765 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6766)]
6767pub fn vdup_n_s16(value: i16) -> int16x4_t {
6768 int16x4_t::splat(value)
6769}
6770
6771#[inline]
6773#[target_feature(enable = "neon")]
6774#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6775#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.32"))]
6776#[cfg_attr(
6777 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6778 assert_instr(dup)
6779)]
6780#[cfg_attr(
6781 not(target_arch = "arm"),
6782 stable(feature = "neon_intrinsics", since = "1.59.0")
6783)]
6784#[cfg_attr(
6785 target_arch = "arm",
6786 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6787)]
6788pub fn vdup_n_s32(value: i32) -> int32x2_t {
6789 int32x2_t::splat(value)
6790}
6791
6792#[inline]
6794#[target_feature(enable = "neon")]
6795#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6796#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
6797#[cfg_attr(
6798 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6799 assert_instr(fmov)
6800)]
6801#[cfg_attr(
6802 not(target_arch = "arm"),
6803 stable(feature = "neon_intrinsics", since = "1.59.0")
6804)]
6805#[cfg_attr(
6806 target_arch = "arm",
6807 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6808)]
6809pub fn vdup_n_s64(value: i64) -> int64x1_t {
6810 int64x1_t::splat(value)
6811}
6812
6813#[inline]
6815#[target_feature(enable = "neon")]
6816#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6817#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.8"))]
6818#[cfg_attr(
6819 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6820 assert_instr(dup)
6821)]
6822#[cfg_attr(
6823 not(target_arch = "arm"),
6824 stable(feature = "neon_intrinsics", since = "1.59.0")
6825)]
6826#[cfg_attr(
6827 target_arch = "arm",
6828 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6829)]
6830pub fn vdup_n_u8(value: u8) -> uint8x8_t {
6831 uint8x8_t::splat(value)
6832}
6833
6834#[inline]
6836#[target_feature(enable = "neon")]
6837#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6838#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16"))]
6839#[cfg_attr(
6840 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6841 assert_instr(dup)
6842)]
6843#[cfg_attr(
6844 not(target_arch = "arm"),
6845 stable(feature = "neon_intrinsics", since = "1.59.0")
6846)]
6847#[cfg_attr(
6848 target_arch = "arm",
6849 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6850)]
6851pub fn vdup_n_u16(value: u16) -> uint16x4_t {
6852 uint16x4_t::splat(value)
6853}
6854
6855#[inline]
6857#[target_feature(enable = "neon")]
6858#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6859#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.32"))]
6860#[cfg_attr(
6861 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6862 assert_instr(dup)
6863)]
6864#[cfg_attr(
6865 not(target_arch = "arm"),
6866 stable(feature = "neon_intrinsics", since = "1.59.0")
6867)]
6868#[cfg_attr(
6869 target_arch = "arm",
6870 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6871)]
6872pub fn vdup_n_u32(value: u32) -> uint32x2_t {
6873 uint32x2_t::splat(value)
6874}
6875
6876#[inline]
6878#[target_feature(enable = "neon")]
6879#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6880#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
6881#[cfg_attr(
6882 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6883 assert_instr(fmov)
6884)]
6885#[cfg_attr(
6886 not(target_arch = "arm"),
6887 stable(feature = "neon_intrinsics", since = "1.59.0")
6888)]
6889#[cfg_attr(
6890 target_arch = "arm",
6891 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6892)]
6893pub fn vdup_n_u64(value: u64) -> uint64x1_t {
6894 uint64x1_t::splat(value)
6895}
6896
6897#[inline]
6899#[target_feature(enable = "neon")]
6900#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6901#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.8"))]
6902#[cfg_attr(
6903 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6904 assert_instr(dup)
6905)]
6906#[cfg_attr(
6907 not(target_arch = "arm"),
6908 stable(feature = "neon_intrinsics", since = "1.59.0")
6909)]
6910#[cfg_attr(
6911 target_arch = "arm",
6912 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6913)]
6914pub fn vdup_n_p8(value: p8) -> poly8x8_t {
6915 poly8x8_t::splat(value)
6916}
6917
6918#[inline]
6920#[target_feature(enable = "neon")]
6921#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6922#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16"))]
6923#[cfg_attr(
6924 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6925 assert_instr(dup)
6926)]
6927#[cfg_attr(
6928 not(target_arch = "arm"),
6929 stable(feature = "neon_intrinsics", since = "1.59.0")
6930)]
6931#[cfg_attr(
6932 target_arch = "arm",
6933 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6934)]
6935pub fn vdup_n_p16(value: p16) -> poly16x4_t {
6936 poly16x4_t::splat(value)
6937}
6938
6939#[inline]
6941#[target_feature(enable = "neon")]
6942#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6943#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.32"))]
6944#[cfg_attr(
6945 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6946 assert_instr(dup)
6947)]
6948#[cfg_attr(
6949 not(target_arch = "arm"),
6950 stable(feature = "neon_intrinsics", since = "1.59.0")
6951)]
6952#[cfg_attr(
6953 target_arch = "arm",
6954 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6955)]
6956pub fn vdup_n_f32(value: f32) -> float32x2_t {
6957 float32x2_t::splat(value)
6958}
6959
6960#[inline]
6965#[target_feature(enable = "neon")]
6966#[cfg_attr(target_arch = "arm", target_feature(enable = "vfp4"))]
6967#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.32"))]
6968#[cfg_attr(
6969 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6970 assert_instr(dup)
6971)]
6972#[cfg_attr(
6973 not(target_arch = "arm"),
6974 stable(feature = "neon_intrinsics", since = "1.59.0")
6975)]
6976fn vdup_n_f32_vfp4(value: f32) -> float32x2_t {
6977 float32x2_t::splat(value)
6978}
6979
6980#[inline]
6982#[target_feature(enable = "neon")]
6983#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6984#[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))]
6985#[cfg_attr(
6986 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6987 assert_instr(nop)
6988)]
6989#[cfg_attr(
6990 not(target_arch = "arm"),
6991 stable(feature = "neon_intrinsics", since = "1.59.0")
6992)]
6993#[cfg_attr(
6994 target_arch = "arm",
6995 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6996)]
6997pub unsafe fn vldrq_p128(a: *const p128) -> p128 {
6998 *a
6999}
7000
7001#[inline]
7003#[target_feature(enable = "neon")]
7004#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7005#[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))]
7006#[cfg_attr(
7007 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7008 assert_instr(nop)
7009)]
7010#[cfg_attr(
7011 not(target_arch = "arm"),
7012 stable(feature = "neon_intrinsics", since = "1.59.0")
7013)]
7014#[cfg_attr(
7015 target_arch = "arm",
7016 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7017)]
7018pub unsafe fn vstrq_p128(a: *mut p128, b: p128) {
7019 *a = b;
7020}
7021
7022#[inline]
7024#[target_feature(enable = "neon")]
7025#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7026#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.8"))]
7027#[cfg_attr(
7028 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7029 assert_instr(dup)
7030)]
7031#[cfg_attr(
7032 not(target_arch = "arm"),
7033 stable(feature = "neon_intrinsics", since = "1.59.0")
7034)]
7035#[cfg_attr(
7036 target_arch = "arm",
7037 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7038)]
7039pub fn vmov_n_s8(value: i8) -> int8x8_t {
7040 vdup_n_s8(value)
7041}
7042
7043#[inline]
7045#[target_feature(enable = "neon")]
7046#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7047#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16"))]
7048#[cfg_attr(
7049 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7050 assert_instr(dup)
7051)]
7052#[cfg_attr(
7053 not(target_arch = "arm"),
7054 stable(feature = "neon_intrinsics", since = "1.59.0")
7055)]
7056#[cfg_attr(
7057 target_arch = "arm",
7058 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7059)]
7060pub fn vmov_n_s16(value: i16) -> int16x4_t {
7061 vdup_n_s16(value)
7062}
7063
7064#[inline]
7066#[target_feature(enable = "neon")]
7067#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7068#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.32"))]
7069#[cfg_attr(
7070 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7071 assert_instr(dup)
7072)]
7073#[cfg_attr(
7074 not(target_arch = "arm"),
7075 stable(feature = "neon_intrinsics", since = "1.59.0")
7076)]
7077#[cfg_attr(
7078 target_arch = "arm",
7079 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7080)]
7081pub fn vmov_n_s32(value: i32) -> int32x2_t {
7082 vdup_n_s32(value)
7083}
7084
7085#[inline]
7087#[target_feature(enable = "neon")]
7088#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7089#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
7090#[cfg_attr(
7091 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7092 assert_instr(fmov)
7093)]
7094#[cfg_attr(
7095 not(target_arch = "arm"),
7096 stable(feature = "neon_intrinsics", since = "1.59.0")
7097)]
7098#[cfg_attr(
7099 target_arch = "arm",
7100 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7101)]
7102pub fn vmov_n_s64(value: i64) -> int64x1_t {
7103 vdup_n_s64(value)
7104}
7105
7106#[inline]
7108#[target_feature(enable = "neon")]
7109#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7110#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.8"))]
7111#[cfg_attr(
7112 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7113 assert_instr(dup)
7114)]
7115#[cfg_attr(
7116 not(target_arch = "arm"),
7117 stable(feature = "neon_intrinsics", since = "1.59.0")
7118)]
7119#[cfg_attr(
7120 target_arch = "arm",
7121 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7122)]
7123pub fn vmov_n_u8(value: u8) -> uint8x8_t {
7124 vdup_n_u8(value)
7125}
7126
7127#[inline]
7129#[target_feature(enable = "neon")]
7130#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7131#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16"))]
7132#[cfg_attr(
7133 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7134 assert_instr(dup)
7135)]
7136#[cfg_attr(
7137 not(target_arch = "arm"),
7138 stable(feature = "neon_intrinsics", since = "1.59.0")
7139)]
7140#[cfg_attr(
7141 target_arch = "arm",
7142 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7143)]
7144pub fn vmov_n_u16(value: u16) -> uint16x4_t {
7145 vdup_n_u16(value)
7146}
7147
7148#[inline]
7150#[target_feature(enable = "neon")]
7151#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7152#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.32"))]
7153#[cfg_attr(
7154 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7155 assert_instr(dup)
7156)]
7157#[cfg_attr(
7158 not(target_arch = "arm"),
7159 stable(feature = "neon_intrinsics", since = "1.59.0")
7160)]
7161#[cfg_attr(
7162 target_arch = "arm",
7163 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7164)]
7165pub fn vmov_n_u32(value: u32) -> uint32x2_t {
7166 vdup_n_u32(value)
7167}
7168
7169#[inline]
7171#[target_feature(enable = "neon")]
7172#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7173#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
7174#[cfg_attr(
7175 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7176 assert_instr(fmov)
7177)]
7178#[cfg_attr(
7179 not(target_arch = "arm"),
7180 stable(feature = "neon_intrinsics", since = "1.59.0")
7181)]
7182#[cfg_attr(
7183 target_arch = "arm",
7184 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7185)]
7186pub fn vmov_n_u64(value: u64) -> uint64x1_t {
7187 vdup_n_u64(value)
7188}
7189
7190#[inline]
7192#[target_feature(enable = "neon")]
7193#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7194#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.8"))]
7195#[cfg_attr(
7196 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7197 assert_instr(dup)
7198)]
7199#[cfg_attr(
7200 not(target_arch = "arm"),
7201 stable(feature = "neon_intrinsics", since = "1.59.0")
7202)]
7203#[cfg_attr(
7204 target_arch = "arm",
7205 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7206)]
7207pub fn vmov_n_p8(value: p8) -> poly8x8_t {
7208 vdup_n_p8(value)
7209}
7210
7211#[inline]
7213#[target_feature(enable = "neon")]
7214#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7215#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16"))]
7216#[cfg_attr(
7217 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7218 assert_instr(dup)
7219)]
7220#[cfg_attr(
7221 not(target_arch = "arm"),
7222 stable(feature = "neon_intrinsics", since = "1.59.0")
7223)]
7224#[cfg_attr(
7225 target_arch = "arm",
7226 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7227)]
7228pub fn vmov_n_p16(value: p16) -> poly16x4_t {
7229 vdup_n_p16(value)
7230}
7231
7232#[inline]
7234#[target_feature(enable = "neon")]
7235#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7236#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.32"))]
7237#[cfg_attr(
7238 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7239 assert_instr(dup)
7240)]
7241#[cfg_attr(
7242 not(target_arch = "arm"),
7243 stable(feature = "neon_intrinsics", since = "1.59.0")
7244)]
7245#[cfg_attr(
7246 target_arch = "arm",
7247 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7248)]
7249pub fn vmov_n_f32(value: f32) -> float32x2_t {
7250 vdup_n_f32(value)
7251}
7252
7253#[inline]
7255#[target_feature(enable = "neon")]
7256#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7257#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.8"))]
7258#[cfg_attr(
7259 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7260 assert_instr(dup)
7261)]
7262#[cfg_attr(
7263 not(target_arch = "arm"),
7264 stable(feature = "neon_intrinsics", since = "1.59.0")
7265)]
7266#[cfg_attr(
7267 target_arch = "arm",
7268 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7269)]
7270pub fn vmovq_n_s8(value: i8) -> int8x16_t {
7271 vdupq_n_s8(value)
7272}
7273
7274#[inline]
7276#[target_feature(enable = "neon")]
7277#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7278#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16"))]
7279#[cfg_attr(
7280 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7281 assert_instr(dup)
7282)]
7283#[cfg_attr(
7284 not(target_arch = "arm"),
7285 stable(feature = "neon_intrinsics", since = "1.59.0")
7286)]
7287#[cfg_attr(
7288 target_arch = "arm",
7289 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7290)]
7291pub fn vmovq_n_s16(value: i16) -> int16x8_t {
7292 vdupq_n_s16(value)
7293}
7294
7295#[inline]
7297#[target_feature(enable = "neon")]
7298#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7299#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.32"))]
7300#[cfg_attr(
7301 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7302 assert_instr(dup)
7303)]
7304#[cfg_attr(
7305 not(target_arch = "arm"),
7306 stable(feature = "neon_intrinsics", since = "1.59.0")
7307)]
7308#[cfg_attr(
7309 target_arch = "arm",
7310 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7311)]
7312pub fn vmovq_n_s32(value: i32) -> int32x4_t {
7313 vdupq_n_s32(value)
7314}
7315
7316#[inline]
7318#[target_feature(enable = "neon")]
7319#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7320#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
7321#[cfg_attr(
7322 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7323 assert_instr(dup)
7324)]
7325#[cfg_attr(
7326 not(target_arch = "arm"),
7327 stable(feature = "neon_intrinsics", since = "1.59.0")
7328)]
7329#[cfg_attr(
7330 target_arch = "arm",
7331 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7332)]
7333pub fn vmovq_n_s64(value: i64) -> int64x2_t {
7334 vdupq_n_s64(value)
7335}
7336
7337#[inline]
7339#[target_feature(enable = "neon")]
7340#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7341#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.8"))]
7342#[cfg_attr(
7343 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7344 assert_instr(dup)
7345)]
7346#[cfg_attr(
7347 not(target_arch = "arm"),
7348 stable(feature = "neon_intrinsics", since = "1.59.0")
7349)]
7350#[cfg_attr(
7351 target_arch = "arm",
7352 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7353)]
7354pub fn vmovq_n_u8(value: u8) -> uint8x16_t {
7355 vdupq_n_u8(value)
7356}
7357
7358#[inline]
7360#[target_feature(enable = "neon")]
7361#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7362#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16"))]
7363#[cfg_attr(
7364 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7365 assert_instr(dup)
7366)]
7367#[cfg_attr(
7368 not(target_arch = "arm"),
7369 stable(feature = "neon_intrinsics", since = "1.59.0")
7370)]
7371#[cfg_attr(
7372 target_arch = "arm",
7373 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7374)]
7375pub fn vmovq_n_u16(value: u16) -> uint16x8_t {
7376 vdupq_n_u16(value)
7377}
7378
7379#[inline]
7381#[target_feature(enable = "neon")]
7382#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7383#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.32"))]
7384#[cfg_attr(
7385 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7386 assert_instr(dup)
7387)]
7388#[cfg_attr(
7389 not(target_arch = "arm"),
7390 stable(feature = "neon_intrinsics", since = "1.59.0")
7391)]
7392#[cfg_attr(
7393 target_arch = "arm",
7394 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7395)]
7396pub fn vmovq_n_u32(value: u32) -> uint32x4_t {
7397 vdupq_n_u32(value)
7398}
7399
7400#[inline]
7402#[target_feature(enable = "neon")]
7403#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7404#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
7405#[cfg_attr(
7406 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7407 assert_instr(dup)
7408)]
7409#[cfg_attr(
7410 not(target_arch = "arm"),
7411 stable(feature = "neon_intrinsics", since = "1.59.0")
7412)]
7413#[cfg_attr(
7414 target_arch = "arm",
7415 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7416)]
7417pub fn vmovq_n_u64(value: u64) -> uint64x2_t {
7418 vdupq_n_u64(value)
7419}
7420
7421#[inline]
7423#[target_feature(enable = "neon")]
7424#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7425#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.8"))]
7426#[cfg_attr(
7427 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7428 assert_instr(dup)
7429)]
7430#[cfg_attr(
7431 not(target_arch = "arm"),
7432 stable(feature = "neon_intrinsics", since = "1.59.0")
7433)]
7434#[cfg_attr(
7435 target_arch = "arm",
7436 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7437)]
7438pub fn vmovq_n_p8(value: p8) -> poly8x16_t {
7439 vdupq_n_p8(value)
7440}
7441
7442#[inline]
7444#[target_feature(enable = "neon")]
7445#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7446#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16"))]
7447#[cfg_attr(
7448 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7449 assert_instr(dup)
7450)]
7451#[cfg_attr(
7452 not(target_arch = "arm"),
7453 stable(feature = "neon_intrinsics", since = "1.59.0")
7454)]
7455#[cfg_attr(
7456 target_arch = "arm",
7457 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7458)]
7459pub fn vmovq_n_p16(value: p16) -> poly16x8_t {
7460 vdupq_n_p16(value)
7461}
7462
7463#[inline]
7465#[target_feature(enable = "neon")]
7466#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7467#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.32"))]
7468#[cfg_attr(
7469 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7470 assert_instr(dup)
7471)]
7472#[cfg_attr(
7473 not(target_arch = "arm"),
7474 stable(feature = "neon_intrinsics", since = "1.59.0")
7475)]
7476#[cfg_attr(
7477 target_arch = "arm",
7478 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7479)]
7480pub fn vmovq_n_f32(value: f32) -> float32x4_t {
7481 vdupq_n_f32(value)
7482}
7483
7484#[inline]
7486#[target_feature(enable = "neon")]
7487#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7488#[cfg_attr(all(test, target_arch = "arm"), assert_instr("nop", N = 0))]
7489#[cfg_attr(
7490 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7491 assert_instr("nop", N = 0)
7492)]
7493#[rustc_legacy_const_generics(2)]
7494#[cfg_attr(
7495 not(target_arch = "arm"),
7496 stable(feature = "neon_intrinsics", since = "1.59.0")
7497)]
7498#[cfg_attr(
7499 target_arch = "arm",
7500 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7501)]
7502pub fn vext_s64<const N: i32>(a: int64x1_t, _b: int64x1_t) -> int64x1_t {
7503 static_assert!(N == 0);
7504 a
7505}
7506
7507#[inline]
7509#[target_feature(enable = "neon")]
7510#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7511#[cfg_attr(all(test, target_arch = "arm"), assert_instr("nop", N = 0))]
7512#[cfg_attr(
7513 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7514 assert_instr("nop", N = 0)
7515)]
7516#[rustc_legacy_const_generics(2)]
7517#[cfg_attr(
7518 not(target_arch = "arm"),
7519 stable(feature = "neon_intrinsics", since = "1.59.0")
7520)]
7521#[cfg_attr(
7522 target_arch = "arm",
7523 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7524)]
7525pub fn vext_u64<const N: i32>(a: uint64x1_t, _b: uint64x1_t) -> uint64x1_t {
7526 static_assert!(N == 0);
7527 a
7528}
7529
7530#[inline]
7532#[target_feature(enable = "neon")]
7533#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7534#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev16.8"))]
7535#[cfg_attr(
7536 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7537 assert_instr(rev16)
7538)]
7539#[cfg_attr(
7540 not(target_arch = "arm"),
7541 stable(feature = "neon_intrinsics", since = "1.59.0")
7542)]
7543#[cfg_attr(
7544 target_arch = "arm",
7545 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7546)]
7547pub fn vrev16_s8(a: int8x8_t) -> int8x8_t {
7548 unsafe { simd_shuffle!(a, a, [1, 0, 3, 2, 5, 4, 7, 6]) }
7549}
7550
7551#[inline]
7553#[target_feature(enable = "neon")]
7554#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7555#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev16.8"))]
7556#[cfg_attr(
7557 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7558 assert_instr(rev16)
7559)]
7560#[cfg_attr(
7561 not(target_arch = "arm"),
7562 stable(feature = "neon_intrinsics", since = "1.59.0")
7563)]
7564#[cfg_attr(
7565 target_arch = "arm",
7566 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7567)]
7568pub fn vrev16q_s8(a: int8x16_t) -> int8x16_t {
7569 unsafe { simd_shuffle!(a, a, [1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14]) }
7570}
7571
7572#[inline]
7574#[target_feature(enable = "neon")]
7575#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7576#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev16.8"))]
7577#[cfg_attr(
7578 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7579 assert_instr(rev16)
7580)]
7581#[cfg_attr(
7582 not(target_arch = "arm"),
7583 stable(feature = "neon_intrinsics", since = "1.59.0")
7584)]
7585#[cfg_attr(
7586 target_arch = "arm",
7587 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7588)]
7589pub fn vrev16_u8(a: uint8x8_t) -> uint8x8_t {
7590 unsafe { simd_shuffle!(a, a, [1, 0, 3, 2, 5, 4, 7, 6]) }
7591}
7592
7593#[inline]
7595#[target_feature(enable = "neon")]
7596#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7597#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev16.8"))]
7598#[cfg_attr(
7599 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7600 assert_instr(rev16)
7601)]
7602#[cfg_attr(
7603 not(target_arch = "arm"),
7604 stable(feature = "neon_intrinsics", since = "1.59.0")
7605)]
7606#[cfg_attr(
7607 target_arch = "arm",
7608 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7609)]
7610pub fn vrev16q_u8(a: uint8x16_t) -> uint8x16_t {
7611 unsafe { simd_shuffle!(a, a, [1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14]) }
7612}
7613
7614#[inline]
7616#[target_feature(enable = "neon")]
7617#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7618#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev16.8"))]
7619#[cfg_attr(
7620 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7621 assert_instr(rev16)
7622)]
7623#[cfg_attr(
7624 not(target_arch = "arm"),
7625 stable(feature = "neon_intrinsics", since = "1.59.0")
7626)]
7627#[cfg_attr(
7628 target_arch = "arm",
7629 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7630)]
7631pub fn vrev16_p8(a: poly8x8_t) -> poly8x8_t {
7632 unsafe { simd_shuffle!(a, a, [1, 0, 3, 2, 5, 4, 7, 6]) }
7633}
7634
7635#[inline]
7637#[target_feature(enable = "neon")]
7638#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7639#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev16.8"))]
7640#[cfg_attr(
7641 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7642 assert_instr(rev16)
7643)]
7644#[cfg_attr(
7645 not(target_arch = "arm"),
7646 stable(feature = "neon_intrinsics", since = "1.59.0")
7647)]
7648#[cfg_attr(
7649 target_arch = "arm",
7650 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7651)]
7652pub fn vrev16q_p8(a: poly8x16_t) -> poly8x16_t {
7653 unsafe { simd_shuffle!(a, a, [1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14]) }
7654}
7655
7656#[inline]
7658#[target_feature(enable = "neon")]
7659#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7660#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev32.8"))]
7661#[cfg_attr(
7662 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7663 assert_instr(rev32)
7664)]
7665#[cfg_attr(
7666 not(target_arch = "arm"),
7667 stable(feature = "neon_intrinsics", since = "1.59.0")
7668)]
7669#[cfg_attr(
7670 target_arch = "arm",
7671 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7672)]
7673pub fn vrev32_s8(a: int8x8_t) -> int8x8_t {
7674 unsafe { simd_shuffle!(a, a, [3, 2, 1, 0, 7, 6, 5, 4]) }
7675}
7676
7677#[inline]
7679#[target_feature(enable = "neon")]
7680#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7681#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev32.8"))]
7682#[cfg_attr(
7683 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7684 assert_instr(rev32)
7685)]
7686#[cfg_attr(
7687 not(target_arch = "arm"),
7688 stable(feature = "neon_intrinsics", since = "1.59.0")
7689)]
7690#[cfg_attr(
7691 target_arch = "arm",
7692 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7693)]
7694pub fn vrev32q_s8(a: int8x16_t) -> int8x16_t {
7695 unsafe { simd_shuffle!(a, a, [3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12]) }
7696}
7697
7698#[inline]
7700#[target_feature(enable = "neon")]
7701#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7702#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev32.8"))]
7703#[cfg_attr(
7704 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7705 assert_instr(rev32)
7706)]
7707#[cfg_attr(
7708 not(target_arch = "arm"),
7709 stable(feature = "neon_intrinsics", since = "1.59.0")
7710)]
7711#[cfg_attr(
7712 target_arch = "arm",
7713 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7714)]
7715pub fn vrev32_u8(a: uint8x8_t) -> uint8x8_t {
7716 unsafe { simd_shuffle!(a, a, [3, 2, 1, 0, 7, 6, 5, 4]) }
7717}
7718
7719#[inline]
7721#[target_feature(enable = "neon")]
7722#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7723#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev32.8"))]
7724#[cfg_attr(
7725 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7726 assert_instr(rev32)
7727)]
7728#[cfg_attr(
7729 not(target_arch = "arm"),
7730 stable(feature = "neon_intrinsics", since = "1.59.0")
7731)]
7732#[cfg_attr(
7733 target_arch = "arm",
7734 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7735)]
7736pub fn vrev32q_u8(a: uint8x16_t) -> uint8x16_t {
7737 unsafe { simd_shuffle!(a, a, [3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12]) }
7738}
7739
7740#[inline]
7742#[target_feature(enable = "neon")]
7743#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7744#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev32.16"))]
7745#[cfg_attr(
7746 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7747 assert_instr(rev32)
7748)]
7749#[cfg_attr(
7750 not(target_arch = "arm"),
7751 stable(feature = "neon_intrinsics", since = "1.59.0")
7752)]
7753#[cfg_attr(
7754 target_arch = "arm",
7755 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7756)]
7757pub fn vrev32_s16(a: int16x4_t) -> int16x4_t {
7758 unsafe { simd_shuffle!(a, a, [1, 0, 3, 2]) }
7759}
7760
7761#[inline]
7763#[target_feature(enable = "neon")]
7764#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7765#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev32.16"))]
7766#[cfg_attr(
7767 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7768 assert_instr(rev32)
7769)]
7770#[cfg_attr(
7771 not(target_arch = "arm"),
7772 stable(feature = "neon_intrinsics", since = "1.59.0")
7773)]
7774#[cfg_attr(
7775 target_arch = "arm",
7776 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7777)]
7778pub fn vrev32q_s16(a: int16x8_t) -> int16x8_t {
7779 unsafe { simd_shuffle!(a, a, [1, 0, 3, 2, 5, 4, 7, 6]) }
7780}
7781
7782#[inline]
7784#[target_feature(enable = "neon")]
7785#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7786#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev32.16"))]
7787#[cfg_attr(
7788 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7789 assert_instr(rev32)
7790)]
7791#[cfg_attr(
7792 not(target_arch = "arm"),
7793 stable(feature = "neon_intrinsics", since = "1.59.0")
7794)]
7795#[cfg_attr(
7796 target_arch = "arm",
7797 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7798)]
7799pub fn vrev32_p16(a: poly16x4_t) -> poly16x4_t {
7800 unsafe { simd_shuffle!(a, a, [1, 0, 3, 2]) }
7801}
7802
7803#[inline]
7805#[target_feature(enable = "neon")]
7806#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7807#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev32.16"))]
7808#[cfg_attr(
7809 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7810 assert_instr(rev32)
7811)]
7812#[cfg_attr(
7813 not(target_arch = "arm"),
7814 stable(feature = "neon_intrinsics", since = "1.59.0")
7815)]
7816#[cfg_attr(
7817 target_arch = "arm",
7818 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7819)]
7820pub fn vrev32q_p16(a: poly16x8_t) -> poly16x8_t {
7821 unsafe { simd_shuffle!(a, a, [1, 0, 3, 2, 5, 4, 7, 6]) }
7822}
7823
7824#[inline]
7826#[target_feature(enable = "neon")]
7827#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7828#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev32.16"))]
7829#[cfg_attr(
7830 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7831 assert_instr(rev32)
7832)]
7833#[cfg_attr(
7834 not(target_arch = "arm"),
7835 stable(feature = "neon_intrinsics", since = "1.59.0")
7836)]
7837#[cfg_attr(
7838 target_arch = "arm",
7839 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7840)]
7841pub fn vrev32_u16(a: uint16x4_t) -> uint16x4_t {
7842 unsafe { simd_shuffle!(a, a, [1, 0, 3, 2]) }
7843}
7844
7845#[inline]
7847#[target_feature(enable = "neon")]
7848#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7849#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev32.16"))]
7850#[cfg_attr(
7851 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7852 assert_instr(rev32)
7853)]
7854#[cfg_attr(
7855 not(target_arch = "arm"),
7856 stable(feature = "neon_intrinsics", since = "1.59.0")
7857)]
7858#[cfg_attr(
7859 target_arch = "arm",
7860 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7861)]
7862pub fn vrev32q_u16(a: uint16x8_t) -> uint16x8_t {
7863 unsafe { simd_shuffle!(a, a, [1, 0, 3, 2, 5, 4, 7, 6]) }
7864}
7865
7866#[inline]
7868#[target_feature(enable = "neon")]
7869#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7870#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev32.8"))]
7871#[cfg_attr(
7872 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7873 assert_instr(rev32)
7874)]
7875#[cfg_attr(
7876 not(target_arch = "arm"),
7877 stable(feature = "neon_intrinsics", since = "1.59.0")
7878)]
7879#[cfg_attr(
7880 target_arch = "arm",
7881 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7882)]
7883pub fn vrev32_p8(a: poly8x8_t) -> poly8x8_t {
7884 unsafe { simd_shuffle!(a, a, [3, 2, 1, 0, 7, 6, 5, 4]) }
7885}
7886
7887#[inline]
7889#[target_feature(enable = "neon")]
7890#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7891#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev32.8"))]
7892#[cfg_attr(
7893 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7894 assert_instr(rev32)
7895)]
7896#[cfg_attr(
7897 not(target_arch = "arm"),
7898 stable(feature = "neon_intrinsics", since = "1.59.0")
7899)]
7900#[cfg_attr(
7901 target_arch = "arm",
7902 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7903)]
7904pub fn vrev32q_p8(a: poly8x16_t) -> poly8x16_t {
7905 unsafe { simd_shuffle!(a, a, [3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12]) }
7906}
7907
7908#[inline]
7910#[target_feature(enable = "neon")]
7911#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7912#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.8"))]
7913#[cfg_attr(
7914 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7915 assert_instr(rev64)
7916)]
7917#[cfg_attr(
7918 not(target_arch = "arm"),
7919 stable(feature = "neon_intrinsics", since = "1.59.0")
7920)]
7921#[cfg_attr(
7922 target_arch = "arm",
7923 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7924)]
7925pub fn vrev64_s8(a: int8x8_t) -> int8x8_t {
7926 unsafe { simd_shuffle!(a, a, [7, 6, 5, 4, 3, 2, 1, 0]) }
7927}
7928
7929#[inline]
7931#[target_feature(enable = "neon")]
7932#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7933#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.8"))]
7934#[cfg_attr(
7935 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7936 assert_instr(rev64)
7937)]
7938#[cfg_attr(
7939 not(target_arch = "arm"),
7940 stable(feature = "neon_intrinsics", since = "1.59.0")
7941)]
7942#[cfg_attr(
7943 target_arch = "arm",
7944 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7945)]
7946pub fn vrev64q_s8(a: int8x16_t) -> int8x16_t {
7947 unsafe { simd_shuffle!(a, a, [7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8]) }
7948}
7949
7950#[inline]
7952#[target_feature(enable = "neon")]
7953#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7954#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.16"))]
7955#[cfg_attr(
7956 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7957 assert_instr(rev64)
7958)]
7959#[cfg_attr(
7960 not(target_arch = "arm"),
7961 stable(feature = "neon_intrinsics", since = "1.59.0")
7962)]
7963#[cfg_attr(
7964 target_arch = "arm",
7965 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7966)]
7967pub fn vrev64_s16(a: int16x4_t) -> int16x4_t {
7968 unsafe { simd_shuffle!(a, a, [3, 2, 1, 0]) }
7969}
7970
7971#[inline]
7973#[target_feature(enable = "neon")]
7974#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7975#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.16"))]
7976#[cfg_attr(
7977 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7978 assert_instr(rev64)
7979)]
7980#[cfg_attr(
7981 not(target_arch = "arm"),
7982 stable(feature = "neon_intrinsics", since = "1.59.0")
7983)]
7984#[cfg_attr(
7985 target_arch = "arm",
7986 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
7987)]
7988pub fn vrev64q_s16(a: int16x8_t) -> int16x8_t {
7989 unsafe { simd_shuffle!(a, a, [3, 2, 1, 0, 7, 6, 5, 4]) }
7990}
7991
7992#[inline]
7994#[target_feature(enable = "neon")]
7995#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
7996#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.32"))]
7997#[cfg_attr(
7998 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
7999 assert_instr(rev64)
8000)]
8001#[cfg_attr(
8002 not(target_arch = "arm"),
8003 stable(feature = "neon_intrinsics", since = "1.59.0")
8004)]
8005#[cfg_attr(
8006 target_arch = "arm",
8007 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8008)]
8009pub fn vrev64_s32(a: int32x2_t) -> int32x2_t {
8010 unsafe { simd_shuffle!(a, a, [1, 0]) }
8011}
8012
8013#[inline]
8015#[target_feature(enable = "neon")]
8016#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8017#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.32"))]
8018#[cfg_attr(
8019 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8020 assert_instr(rev64)
8021)]
8022#[cfg_attr(
8023 not(target_arch = "arm"),
8024 stable(feature = "neon_intrinsics", since = "1.59.0")
8025)]
8026#[cfg_attr(
8027 target_arch = "arm",
8028 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8029)]
8030pub fn vrev64q_s32(a: int32x4_t) -> int32x4_t {
8031 unsafe { simd_shuffle!(a, a, [1, 0, 3, 2]) }
8032}
8033
8034#[inline]
8036#[target_feature(enable = "neon")]
8037#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8038#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.8"))]
8039#[cfg_attr(
8040 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8041 assert_instr(rev64)
8042)]
8043#[cfg_attr(
8044 not(target_arch = "arm"),
8045 stable(feature = "neon_intrinsics", since = "1.59.0")
8046)]
8047#[cfg_attr(
8048 target_arch = "arm",
8049 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8050)]
8051pub fn vrev64_u8(a: uint8x8_t) -> uint8x8_t {
8052 unsafe { simd_shuffle!(a, a, [7, 6, 5, 4, 3, 2, 1, 0]) }
8053}
8054
8055#[inline]
8057#[target_feature(enable = "neon")]
8058#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8059#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.8"))]
8060#[cfg_attr(
8061 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8062 assert_instr(rev64)
8063)]
8064#[cfg_attr(
8065 not(target_arch = "arm"),
8066 stable(feature = "neon_intrinsics", since = "1.59.0")
8067)]
8068#[cfg_attr(
8069 target_arch = "arm",
8070 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8071)]
8072pub fn vrev64q_u8(a: uint8x16_t) -> uint8x16_t {
8073 unsafe { simd_shuffle!(a, a, [7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8]) }
8074}
8075
8076#[inline]
8078#[target_feature(enable = "neon")]
8079#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8080#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.16"))]
8081#[cfg_attr(
8082 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8083 assert_instr(rev64)
8084)]
8085#[cfg_attr(
8086 not(target_arch = "arm"),
8087 stable(feature = "neon_intrinsics", since = "1.59.0")
8088)]
8089#[cfg_attr(
8090 target_arch = "arm",
8091 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8092)]
8093pub fn vrev64_u16(a: uint16x4_t) -> uint16x4_t {
8094 unsafe { simd_shuffle!(a, a, [3, 2, 1, 0]) }
8095}
8096
8097#[inline]
8099#[target_feature(enable = "neon")]
8100#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8101#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.16"))]
8102#[cfg_attr(
8103 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8104 assert_instr(rev64)
8105)]
8106#[cfg_attr(
8107 not(target_arch = "arm"),
8108 stable(feature = "neon_intrinsics", since = "1.59.0")
8109)]
8110#[cfg_attr(
8111 target_arch = "arm",
8112 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8113)]
8114pub fn vrev64q_u16(a: uint16x8_t) -> uint16x8_t {
8115 unsafe { simd_shuffle!(a, a, [3, 2, 1, 0, 7, 6, 5, 4]) }
8116}
8117
8118#[inline]
8120#[target_feature(enable = "neon")]
8121#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8122#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.32"))]
8123#[cfg_attr(
8124 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8125 assert_instr(rev64)
8126)]
8127#[cfg_attr(
8128 not(target_arch = "arm"),
8129 stable(feature = "neon_intrinsics", since = "1.59.0")
8130)]
8131#[cfg_attr(
8132 target_arch = "arm",
8133 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8134)]
8135pub fn vrev64_u32(a: uint32x2_t) -> uint32x2_t {
8136 unsafe { simd_shuffle!(a, a, [1, 0]) }
8137}
8138
8139#[inline]
8141#[target_feature(enable = "neon")]
8142#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8143#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.32"))]
8144#[cfg_attr(
8145 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8146 assert_instr(rev64)
8147)]
8148#[cfg_attr(
8149 not(target_arch = "arm"),
8150 stable(feature = "neon_intrinsics", since = "1.59.0")
8151)]
8152#[cfg_attr(
8153 target_arch = "arm",
8154 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8155)]
8156pub fn vrev64q_u32(a: uint32x4_t) -> uint32x4_t {
8157 unsafe { simd_shuffle!(a, a, [1, 0, 3, 2]) }
8158}
8159
8160#[inline]
8162#[target_feature(enable = "neon")]
8163#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8164#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.32"))]
8165#[cfg_attr(
8166 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8167 assert_instr(rev64)
8168)]
8169#[cfg_attr(
8170 not(target_arch = "arm"),
8171 stable(feature = "neon_intrinsics", since = "1.59.0")
8172)]
8173#[cfg_attr(
8174 target_arch = "arm",
8175 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8176)]
8177pub fn vrev64_f32(a: float32x2_t) -> float32x2_t {
8178 unsafe { simd_shuffle!(a, a, [1, 0]) }
8179}
8180
8181#[inline]
8183#[target_feature(enable = "neon")]
8184#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8185#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.32"))]
8186#[cfg_attr(
8187 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8188 assert_instr(rev64)
8189)]
8190#[cfg_attr(
8191 not(target_arch = "arm"),
8192 stable(feature = "neon_intrinsics", since = "1.59.0")
8193)]
8194#[cfg_attr(
8195 target_arch = "arm",
8196 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8197)]
8198pub fn vrev64q_f32(a: float32x4_t) -> float32x4_t {
8199 unsafe { simd_shuffle!(a, a, [1, 0, 3, 2]) }
8200}
8201
8202#[inline]
8204#[target_feature(enable = "neon")]
8205#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8206#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.8"))]
8207#[cfg_attr(
8208 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8209 assert_instr(rev64)
8210)]
8211#[cfg_attr(
8212 not(target_arch = "arm"),
8213 stable(feature = "neon_intrinsics", since = "1.59.0")
8214)]
8215#[cfg_attr(
8216 target_arch = "arm",
8217 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8218)]
8219pub fn vrev64_p8(a: poly8x8_t) -> poly8x8_t {
8220 unsafe { simd_shuffle!(a, a, [7, 6, 5, 4, 3, 2, 1, 0]) }
8221}
8222
8223#[inline]
8225#[target_feature(enable = "neon")]
8226#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8227#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.8"))]
8228#[cfg_attr(
8229 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8230 assert_instr(rev64)
8231)]
8232#[cfg_attr(
8233 not(target_arch = "arm"),
8234 stable(feature = "neon_intrinsics", since = "1.59.0")
8235)]
8236#[cfg_attr(
8237 target_arch = "arm",
8238 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8239)]
8240pub fn vrev64q_p8(a: poly8x16_t) -> poly8x16_t {
8241 unsafe { simd_shuffle!(a, a, [7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8]) }
8242}
8243
8244#[inline]
8246#[target_feature(enable = "neon")]
8247#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8248#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.16"))]
8249#[cfg_attr(
8250 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8251 assert_instr(rev64)
8252)]
8253#[cfg_attr(
8254 not(target_arch = "arm"),
8255 stable(feature = "neon_intrinsics", since = "1.59.0")
8256)]
8257#[cfg_attr(
8258 target_arch = "arm",
8259 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8260)]
8261pub fn vrev64_p16(a: poly16x4_t) -> poly16x4_t {
8262 unsafe { simd_shuffle!(a, a, [3, 2, 1, 0]) }
8263}
8264
8265#[inline]
8267#[target_feature(enable = "neon")]
8268#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
8269#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrev64.16"))]
8270#[cfg_attr(
8271 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
8272 assert_instr(rev64)
8273)]
8274#[cfg_attr(
8275 not(target_arch = "arm"),
8276 stable(feature = "neon_intrinsics", since = "1.59.0")
8277)]
8278#[cfg_attr(
8279 target_arch = "arm",
8280 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
8281)]
8282pub fn vrev64q_p16(a: poly16x8_t) -> poly16x8_t {
8283 unsafe { simd_shuffle!(a, a, [3, 2, 1, 0, 7, 6, 5, 4]) }
8284}
8285
8286#[cfg(test)]
8301mod tests {
8302 use super::*;
8303 #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))]
8304 use crate::core_arch::aarch64::*;
8305 #[cfg(target_arch = "arm")]
8306 use crate::core_arch::arm::*;
8307 use crate::core_arch::arm_shared::test_support::*;
8308 use crate::core_arch::simd::*;
8309 use std::{mem::transmute, vec::Vec};
8310 use stdarch_test::simd_test;
8311
8312 #[simd_test(enable = "neon")]
8313 unsafe fn test_vld1_lane_s8() {
8314 let a = i8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
8315 let elem: i8 = 42;
8316 let e = i8x8::new(0, 1, 2, 3, 4, 5, 6, 42);
8317 let r: i8x8 = transmute(vld1_lane_s8::<7>(&elem, transmute(a)));
8318 assert_eq!(r, e)
8319 }
8320
8321 #[simd_test(enable = "neon")]
8322 unsafe fn test_vld1q_lane_s8() {
8323 let a = i8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
8324 let elem: i8 = 42;
8325 let e = i8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 42);
8326 let r: i8x16 = transmute(vld1q_lane_s8::<15>(&elem, transmute(a)));
8327 assert_eq!(r, e)
8328 }
8329
8330 #[simd_test(enable = "neon")]
8331 unsafe fn test_vld1_lane_s16() {
8332 let a = i16x4::new(0, 1, 2, 3);
8333 let elem: i16 = 42;
8334 let e = i16x4::new(0, 1, 2, 42);
8335 let r: i16x4 = transmute(vld1_lane_s16::<3>(&elem, transmute(a)));
8336 assert_eq!(r, e)
8337 }
8338
8339 #[simd_test(enable = "neon")]
8340 unsafe fn test_vld1q_lane_s16() {
8341 let a = i16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
8342 let elem: i16 = 42;
8343 let e = i16x8::new(0, 1, 2, 3, 4, 5, 6, 42);
8344 let r: i16x8 = transmute(vld1q_lane_s16::<7>(&elem, transmute(a)));
8345 assert_eq!(r, e)
8346 }
8347
8348 #[simd_test(enable = "neon")]
8349 unsafe fn test_vld1_lane_s32() {
8350 let a = i32x2::new(0, 1);
8351 let elem: i32 = 42;
8352 let e = i32x2::new(0, 42);
8353 let r: i32x2 = transmute(vld1_lane_s32::<1>(&elem, transmute(a)));
8354 assert_eq!(r, e)
8355 }
8356
8357 #[simd_test(enable = "neon")]
8358 unsafe fn test_vld1q_lane_s32() {
8359 let a = i32x4::new(0, 1, 2, 3);
8360 let elem: i32 = 42;
8361 let e = i32x4::new(0, 1, 2, 42);
8362 let r: i32x4 = transmute(vld1q_lane_s32::<3>(&elem, transmute(a)));
8363 assert_eq!(r, e)
8364 }
8365
8366 #[simd_test(enable = "neon")]
8367 unsafe fn test_vld1_lane_s64() {
8368 let a = i64x1::new(0);
8369 let elem: i64 = 42;
8370 let e = i64x1::new(42);
8371 let r: i64x1 = transmute(vld1_lane_s64::<0>(&elem, transmute(a)));
8372 assert_eq!(r, e)
8373 }
8374
8375 #[simd_test(enable = "neon")]
8376 unsafe fn test_vld1q_lane_s64() {
8377 let a = i64x2::new(0, 1);
8378 let elem: i64 = 42;
8379 let e = i64x2::new(0, 42);
8380 let r: i64x2 = transmute(vld1q_lane_s64::<1>(&elem, transmute(a)));
8381 assert_eq!(r, e)
8382 }
8383
8384 #[simd_test(enable = "neon")]
8385 unsafe fn test_vld1_lane_u8() {
8386 let a = u8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
8387 let elem: u8 = 42;
8388 let e = u8x8::new(0, 1, 2, 3, 4, 5, 6, 42);
8389 let r: u8x8 = transmute(vld1_lane_u8::<7>(&elem, transmute(a)));
8390 assert_eq!(r, e)
8391 }
8392
8393 #[simd_test(enable = "neon")]
8394 unsafe fn test_vld1q_lane_u8() {
8395 let a = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
8396 let elem: u8 = 42;
8397 let e = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 42);
8398 let r: u8x16 = transmute(vld1q_lane_u8::<15>(&elem, transmute(a)));
8399 assert_eq!(r, e)
8400 }
8401
8402 #[simd_test(enable = "neon")]
8403 unsafe fn test_vld1_lane_u16() {
8404 let a = u16x4::new(0, 1, 2, 3);
8405 let elem: u16 = 42;
8406 let e = u16x4::new(0, 1, 2, 42);
8407 let r: u16x4 = transmute(vld1_lane_u16::<3>(&elem, transmute(a)));
8408 assert_eq!(r, e)
8409 }
8410
8411 #[simd_test(enable = "neon")]
8412 unsafe fn test_vld1q_lane_u16() {
8413 let a = u16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
8414 let elem: u16 = 42;
8415 let e = u16x8::new(0, 1, 2, 3, 4, 5, 6, 42);
8416 let r: u16x8 = transmute(vld1q_lane_u16::<7>(&elem, transmute(a)));
8417 assert_eq!(r, e)
8418 }
8419
8420 #[simd_test(enable = "neon")]
8421 unsafe fn test_vld1_lane_u32() {
8422 let a = u32x2::new(0, 1);
8423 let elem: u32 = 42;
8424 let e = u32x2::new(0, 42);
8425 let r: u32x2 = transmute(vld1_lane_u32::<1>(&elem, transmute(a)));
8426 assert_eq!(r, e)
8427 }
8428
8429 #[simd_test(enable = "neon")]
8430 unsafe fn test_vld1q_lane_u32() {
8431 let a = u32x4::new(0, 1, 2, 3);
8432 let elem: u32 = 42;
8433 let e = u32x4::new(0, 1, 2, 42);
8434 let r: u32x4 = transmute(vld1q_lane_u32::<3>(&elem, transmute(a)));
8435 assert_eq!(r, e)
8436 }
8437
8438 #[simd_test(enable = "neon")]
8439 unsafe fn test_vld1_lane_u64() {
8440 let a = u64x1::new(0);
8441 let elem: u64 = 42;
8442 let e = u64x1::new(42);
8443 let r: u64x1 = transmute(vld1_lane_u64::<0>(&elem, transmute(a)));
8444 assert_eq!(r, e)
8445 }
8446
8447 #[simd_test(enable = "neon")]
8448 unsafe fn test_vld1q_lane_u64() {
8449 let a = u64x2::new(0, 1);
8450 let elem: u64 = 42;
8451 let e = u64x2::new(0, 42);
8452 let r: u64x2 = transmute(vld1q_lane_u64::<1>(&elem, transmute(a)));
8453 assert_eq!(r, e)
8454 }
8455
8456 #[simd_test(enable = "neon")]
8457 unsafe fn test_vld1_lane_p8() {
8458 let a = u8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
8459 let elem: p8 = 42;
8460 let e = u8x8::new(0, 1, 2, 3, 4, 5, 6, 42);
8461 let r: u8x8 = transmute(vld1_lane_p8::<7>(&elem, transmute(a)));
8462 assert_eq!(r, e)
8463 }
8464
8465 #[simd_test(enable = "neon")]
8466 unsafe fn test_vld1q_lane_p8() {
8467 let a = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
8468 let elem: p8 = 42;
8469 let e = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 42);
8470 let r: u8x16 = transmute(vld1q_lane_p8::<15>(&elem, transmute(a)));
8471 assert_eq!(r, e)
8472 }
8473
8474 #[simd_test(enable = "neon")]
8475 unsafe fn test_vld1_lane_p16() {
8476 let a = u16x4::new(0, 1, 2, 3);
8477 let elem: p16 = 42;
8478 let e = u16x4::new(0, 1, 2, 42);
8479 let r: u16x4 = transmute(vld1_lane_p16::<3>(&elem, transmute(a)));
8480 assert_eq!(r, e)
8481 }
8482
8483 #[simd_test(enable = "neon")]
8484 unsafe fn test_vld1q_lane_p16() {
8485 let a = u16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
8486 let elem: p16 = 42;
8487 let e = u16x8::new(0, 1, 2, 3, 4, 5, 6, 42);
8488 let r: u16x8 = transmute(vld1q_lane_p16::<7>(&elem, transmute(a)));
8489 assert_eq!(r, e)
8490 }
8491
8492 #[simd_test(enable = "neon,aes")]
8493 unsafe fn test_vld1_lane_p64() {
8494 let a = u64x1::new(0);
8495 let elem: u64 = 42;
8496 let e = u64x1::new(42);
8497 let r: u64x1 = transmute(vld1_lane_p64::<0>(&elem, transmute(a)));
8498 assert_eq!(r, e)
8499 }
8500
8501 #[simd_test(enable = "neon,aes")]
8502 unsafe fn test_vld1q_lane_p64() {
8503 let a = u64x2::new(0, 1);
8504 let elem: u64 = 42;
8505 let e = u64x2::new(0, 42);
8506 let r: u64x2 = transmute(vld1q_lane_p64::<1>(&elem, transmute(a)));
8507 assert_eq!(r, e)
8508 }
8509
8510 #[simd_test(enable = "neon")]
8511 unsafe fn test_vld1_lane_f32() {
8512 let a = f32x2::new(0., 1.);
8513 let elem: f32 = 42.;
8514 let e = f32x2::new(0., 42.);
8515 let r: f32x2 = transmute(vld1_lane_f32::<1>(&elem, transmute(a)));
8516 assert_eq!(r, e)
8517 }
8518
8519 #[simd_test(enable = "neon")]
8520 unsafe fn test_vld1q_lane_f32() {
8521 let a = f32x4::new(0., 1., 2., 3.);
8522 let elem: f32 = 42.;
8523 let e = f32x4::new(0., 1., 2., 42.);
8524 let r: f32x4 = transmute(vld1q_lane_f32::<3>(&elem, transmute(a)));
8525 assert_eq!(r, e)
8526 }
8527
8528 #[simd_test(enable = "neon")]
8529 unsafe fn test_vld1_dup_s8() {
8530 let elem: i8 = 42;
8531 let e = i8x8::new(42, 42, 42, 42, 42, 42, 42, 42);
8532 let r: i8x8 = transmute(vld1_dup_s8(&elem));
8533 assert_eq!(r, e)
8534 }
8535
8536 #[simd_test(enable = "neon")]
8537 unsafe fn test_vld1q_dup_s8() {
8538 let elem: i8 = 42;
8539 let e = i8x16::new(
8540 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42,
8541 );
8542 let r: i8x16 = transmute(vld1q_dup_s8(&elem));
8543 assert_eq!(r, e)
8544 }
8545
8546 #[simd_test(enable = "neon")]
8547 unsafe fn test_vld1_dup_s16() {
8548 let elem: i16 = 42;
8549 let e = i16x4::new(42, 42, 42, 42);
8550 let r: i16x4 = transmute(vld1_dup_s16(&elem));
8551 assert_eq!(r, e)
8552 }
8553
8554 #[simd_test(enable = "neon")]
8555 unsafe fn test_vld1q_dup_s16() {
8556 let elem: i16 = 42;
8557 let e = i16x8::new(42, 42, 42, 42, 42, 42, 42, 42);
8558 let r: i16x8 = transmute(vld1q_dup_s16(&elem));
8559 assert_eq!(r, e)
8560 }
8561
8562 #[simd_test(enable = "neon")]
8563 unsafe fn test_vld1_dup_s32() {
8564 let elem: i32 = 42;
8565 let e = i32x2::new(42, 42);
8566 let r: i32x2 = transmute(vld1_dup_s32(&elem));
8567 assert_eq!(r, e)
8568 }
8569
8570 #[simd_test(enable = "neon")]
8571 unsafe fn test_vld1q_dup_s32() {
8572 let elem: i32 = 42;
8573 let e = i32x4::new(42, 42, 42, 42);
8574 let r: i32x4 = transmute(vld1q_dup_s32(&elem));
8575 assert_eq!(r, e)
8576 }
8577
8578 #[simd_test(enable = "neon")]
8579 unsafe fn test_vld1_dup_s64() {
8580 let elem: i64 = 42;
8581 let e = i64x1::new(42);
8582 let r: i64x1 = transmute(vld1_dup_s64(&elem));
8583 assert_eq!(r, e)
8584 }
8585
8586 #[simd_test(enable = "neon")]
8587 unsafe fn test_vld1q_dup_s64() {
8588 let elem: i64 = 42;
8589 let e = i64x2::new(42, 42);
8590 let r: i64x2 = transmute(vld1q_dup_s64(&elem));
8591 assert_eq!(r, e)
8592 }
8593
8594 #[simd_test(enable = "neon")]
8595 unsafe fn test_vld1_dup_u8() {
8596 let elem: u8 = 42;
8597 let e = u8x8::new(42, 42, 42, 42, 42, 42, 42, 42);
8598 let r: u8x8 = transmute(vld1_dup_u8(&elem));
8599 assert_eq!(r, e)
8600 }
8601
8602 #[simd_test(enable = "neon")]
8603 unsafe fn test_vld1q_dup_u8() {
8604 let elem: u8 = 42;
8605 let e = u8x16::new(
8606 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42,
8607 );
8608 let r: u8x16 = transmute(vld1q_dup_u8(&elem));
8609 assert_eq!(r, e)
8610 }
8611
8612 #[simd_test(enable = "neon")]
8613 unsafe fn test_vld1_dup_u16() {
8614 let elem: u16 = 42;
8615 let e = u16x4::new(42, 42, 42, 42);
8616 let r: u16x4 = transmute(vld1_dup_u16(&elem));
8617 assert_eq!(r, e)
8618 }
8619
8620 #[simd_test(enable = "neon")]
8621 unsafe fn test_vld1q_dup_u16() {
8622 let elem: u16 = 42;
8623 let e = u16x8::new(42, 42, 42, 42, 42, 42, 42, 42);
8624 let r: u16x8 = transmute(vld1q_dup_u16(&elem));
8625 assert_eq!(r, e)
8626 }
8627
8628 #[simd_test(enable = "neon")]
8629 unsafe fn test_vld1_dup_u32() {
8630 let elem: u32 = 42;
8631 let e = u32x2::new(42, 42);
8632 let r: u32x2 = transmute(vld1_dup_u32(&elem));
8633 assert_eq!(r, e)
8634 }
8635
8636 #[simd_test(enable = "neon")]
8637 unsafe fn test_vld1q_dup_u32() {
8638 let elem: u32 = 42;
8639 let e = u32x4::new(42, 42, 42, 42);
8640 let r: u32x4 = transmute(vld1q_dup_u32(&elem));
8641 assert_eq!(r, e)
8642 }
8643
8644 #[simd_test(enable = "neon")]
8645 unsafe fn test_vld1_dup_u64() {
8646 let elem: u64 = 42;
8647 let e = u64x1::new(42);
8648 let r: u64x1 = transmute(vld1_dup_u64(&elem));
8649 assert_eq!(r, e)
8650 }
8651
8652 #[simd_test(enable = "neon")]
8653 unsafe fn test_vld1q_dup_u64() {
8654 let elem: u64 = 42;
8655 let e = u64x2::new(42, 42);
8656 let r: u64x2 = transmute(vld1q_dup_u64(&elem));
8657 assert_eq!(r, e)
8658 }
8659
8660 #[simd_test(enable = "neon")]
8661 unsafe fn test_vld1_dup_p8() {
8662 let elem: p8 = 42;
8663 let e = u8x8::new(42, 42, 42, 42, 42, 42, 42, 42);
8664 let r: u8x8 = transmute(vld1_dup_p8(&elem));
8665 assert_eq!(r, e)
8666 }
8667
8668 #[simd_test(enable = "neon")]
8669 unsafe fn test_vld1q_dup_p8() {
8670 let elem: p8 = 42;
8671 let e = u8x16::new(
8672 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42,
8673 );
8674 let r: u8x16 = transmute(vld1q_dup_p8(&elem));
8675 assert_eq!(r, e)
8676 }
8677
8678 #[simd_test(enable = "neon")]
8679 unsafe fn test_vld1_dup_p16() {
8680 let elem: p16 = 42;
8681 let e = u16x4::new(42, 42, 42, 42);
8682 let r: u16x4 = transmute(vld1_dup_p16(&elem));
8683 assert_eq!(r, e)
8684 }
8685
8686 #[simd_test(enable = "neon")]
8687 unsafe fn test_vld1q_dup_p16() {
8688 let elem: p16 = 42;
8689 let e = u16x8::new(42, 42, 42, 42, 42, 42, 42, 42);
8690 let r: u16x8 = transmute(vld1q_dup_p16(&elem));
8691 assert_eq!(r, e)
8692 }
8693
8694 #[simd_test(enable = "neon,aes")]
8695 unsafe fn test_vld1_dup_p64() {
8696 let elem: u64 = 42;
8697 let e = u64x1::new(42);
8698 let r: u64x1 = transmute(vld1_dup_p64(&elem));
8699 assert_eq!(r, e)
8700 }
8701
8702 #[simd_test(enable = "neon,aes")]
8703 unsafe fn test_vld1q_dup_p64() {
8704 let elem: u64 = 42;
8705 let e = u64x2::new(42, 42);
8706 let r: u64x2 = transmute(vld1q_dup_p64(&elem));
8707 assert_eq!(r, e)
8708 }
8709
8710 #[simd_test(enable = "neon")]
8711 unsafe fn test_vld1_dup_f32() {
8712 let elem: f32 = 42.;
8713 let e = f32x2::new(42., 42.);
8714 let r: f32x2 = transmute(vld1_dup_f32(&elem));
8715 assert_eq!(r, e)
8716 }
8717
8718 #[simd_test(enable = "neon")]
8719 unsafe fn test_vld1q_dup_f32() {
8720 let elem: f32 = 42.;
8721 let e = f32x4::new(42., 42., 42., 42.);
8722 let r: f32x4 = transmute(vld1q_dup_f32(&elem));
8723 assert_eq!(r, e)
8724 }
8725
8726 #[simd_test(enable = "neon")]
8727 unsafe fn test_vget_lane_u8() {
8728 let v = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
8729 let r = vget_lane_u8::<1>(transmute(v));
8730 assert_eq!(r, 2);
8731 }
8732
8733 #[simd_test(enable = "neon")]
8734 unsafe fn test_vgetq_lane_u32() {
8735 let v = i32x4::new(1, 2, 3, 4);
8736 let r = vgetq_lane_u32::<1>(transmute(v));
8737 assert_eq!(r, 2);
8738 }
8739
8740 #[simd_test(enable = "neon")]
8741 unsafe fn test_vgetq_lane_s32() {
8742 let v = i32x4::new(1, 2, 3, 4);
8743 let r = vgetq_lane_s32::<1>(transmute(v));
8744 assert_eq!(r, 2);
8745 }
8746
8747 #[simd_test(enable = "neon")]
8748 unsafe fn test_vget_lane_u64() {
8749 let v: u64 = 1;
8750 let r = vget_lane_u64::<0>(transmute(v));
8751 assert_eq!(r, 1);
8752 }
8753
8754 #[simd_test(enable = "neon")]
8755 unsafe fn test_vgetq_lane_u16() {
8756 let v = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
8757 let r = vgetq_lane_u16::<1>(transmute(v));
8758 assert_eq!(r, 2);
8759 }
8760
8761 #[simd_test(enable = "neon")]
8762 unsafe fn test_vget_lane_s8() {
8763 let v = i8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
8764 let r = vget_lane_s8::<2>(transmute(v));
8765 assert_eq!(r, 2);
8766 let r = vget_lane_s8::<4>(transmute(v));
8767 assert_eq!(r, 4);
8768 let r = vget_lane_s8::<5>(transmute(v));
8769 assert_eq!(r, 5);
8770 }
8771 #[simd_test(enable = "neon")]
8772 unsafe fn test_vget_lane_p8() {
8773 let v = u8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
8774 let r = vget_lane_p8::<2>(transmute(v));
8775 assert_eq!(r, 2);
8776 let r = vget_lane_p8::<3>(transmute(v));
8777 assert_eq!(r, 3);
8778 let r = vget_lane_p8::<5>(transmute(v));
8779 assert_eq!(r, 5);
8780 }
8781
8782 #[simd_test(enable = "neon")]
8783 unsafe fn test_vget_lane_p16() {
8784 let v = u16x4::new(0, 1, 2, 3);
8785 let r = vget_lane_p16::<2>(transmute(v));
8786 assert_eq!(r, 2);
8787 let r = vget_lane_p16::<3>(transmute(v));
8788 assert_eq!(r, 3);
8789 let r = vget_lane_p16::<0>(transmute(v));
8790 assert_eq!(r, 0);
8791 let r = vget_lane_p16::<1>(transmute(v));
8792 assert_eq!(r, 1);
8793 }
8794
8795 #[simd_test(enable = "neon")]
8796 unsafe fn test_vget_lane_s16() {
8797 let v = i16x4::new(0, 1, 2, 3);
8798 let r = vget_lane_s16::<2>(transmute(v));
8799 assert_eq!(r, 2);
8800 let r = vget_lane_s16::<3>(transmute(v));
8801 assert_eq!(r, 3);
8802 let r = vget_lane_s16::<0>(transmute(v));
8803 assert_eq!(r, 0);
8804 let r = vget_lane_s16::<1>(transmute(v));
8805 assert_eq!(r, 1);
8806 }
8807
8808 #[simd_test(enable = "neon")]
8809 unsafe fn test_vget_lane_u16() {
8810 let v = u16x4::new(0, 1, 2, 3);
8811 let r = vget_lane_u16::<2>(transmute(v));
8812 assert_eq!(r, 2);
8813 let r = vget_lane_u16::<3>(transmute(v));
8814 assert_eq!(r, 3);
8815 let r = vget_lane_u16::<0>(transmute(v));
8816 assert_eq!(r, 0);
8817 let r = vget_lane_u16::<1>(transmute(v));
8818 assert_eq!(r, 1);
8819 }
8820 #[simd_test(enable = "neon")]
8821 unsafe fn test_vget_lane_f32() {
8822 let v = f32x2::new(0.0, 1.0);
8823 let r = vget_lane_f32::<1>(transmute(v));
8824 assert_eq!(r, 1.0);
8825 let r = vget_lane_f32::<0>(transmute(v));
8826 assert_eq!(r, 0.0);
8827 }
8828
8829 #[simd_test(enable = "neon")]
8830 unsafe fn test_vget_lane_s32() {
8831 let v = i32x2::new(0, 1);
8832 let r = vget_lane_s32::<1>(transmute(v));
8833 assert_eq!(r, 1);
8834 let r = vget_lane_s32::<0>(transmute(v));
8835 assert_eq!(r, 0);
8836 }
8837
8838 #[simd_test(enable = "neon")]
8839 unsafe fn test_vget_lane_u32() {
8840 let v = u32x2::new(0, 1);
8841 let r = vget_lane_u32::<1>(transmute(v));
8842 assert_eq!(r, 1);
8843 let r = vget_lane_u32::<0>(transmute(v));
8844 assert_eq!(r, 0);
8845 }
8846
8847 #[simd_test(enable = "neon")]
8848 unsafe fn test_vget_lane_s64() {
8849 let v = i64x1::new(1);
8850 let r = vget_lane_s64::<0>(transmute(v));
8851 assert_eq!(r, 1);
8852 }
8853
8854 #[simd_test(enable = "neon")]
8855 unsafe fn test_vget_lane_p64() {
8856 let v = u64x1::new(1);
8857 let r = vget_lane_p64::<0>(transmute(v));
8858 assert_eq!(r, 1);
8859 }
8860
8861 #[simd_test(enable = "neon")]
8862 unsafe fn test_vgetq_lane_s8() {
8863 let v = i8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
8864 let r = vgetq_lane_s8::<7>(transmute(v));
8865 assert_eq!(r, 7);
8866 let r = vgetq_lane_s8::<13>(transmute(v));
8867 assert_eq!(r, 13);
8868 let r = vgetq_lane_s8::<3>(transmute(v));
8869 assert_eq!(r, 3);
8870 let r = vgetq_lane_s8::<0>(transmute(v));
8871 assert_eq!(r, 0);
8872 }
8873
8874 #[simd_test(enable = "neon")]
8875 unsafe fn test_vgetq_lane_p8() {
8876 let v = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
8877 let r = vgetq_lane_p8::<7>(transmute(v));
8878 assert_eq!(r, 7);
8879 let r = vgetq_lane_p8::<13>(transmute(v));
8880 assert_eq!(r, 13);
8881 let r = vgetq_lane_p8::<3>(transmute(v));
8882 assert_eq!(r, 3);
8883 let r = vgetq_lane_p8::<0>(transmute(v));
8884 assert_eq!(r, 0);
8885 }
8886
8887 #[simd_test(enable = "neon")]
8888 unsafe fn test_vgetq_lane_u8() {
8889 let v = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
8890 let r = vgetq_lane_u8::<7>(transmute(v));
8891 assert_eq!(r, 7);
8892 let r = vgetq_lane_u8::<13>(transmute(v));
8893 assert_eq!(r, 13);
8894 let r = vgetq_lane_u8::<3>(transmute(v));
8895 assert_eq!(r, 3);
8896 let r = vgetq_lane_u8::<0>(transmute(v));
8897 assert_eq!(r, 0);
8898 }
8899
8900 #[simd_test(enable = "neon")]
8901 unsafe fn test_vgetq_lane_s16() {
8902 let v = i16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
8903 let r = vgetq_lane_s16::<3>(transmute(v));
8904 assert_eq!(r, 3);
8905 let r = vgetq_lane_s16::<6>(transmute(v));
8906 assert_eq!(r, 6);
8907 let r = vgetq_lane_s16::<0>(transmute(v));
8908 assert_eq!(r, 0);
8909 }
8910
8911 #[simd_test(enable = "neon")]
8912 unsafe fn test_vgetq_lane_p16() {
8913 let v = u16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
8914 let r = vgetq_lane_p16::<3>(transmute(v));
8915 assert_eq!(r, 3);
8916 let r = vgetq_lane_p16::<7>(transmute(v));
8917 assert_eq!(r, 7);
8918 let r = vgetq_lane_p16::<1>(transmute(v));
8919 assert_eq!(r, 1);
8920 }
8921 #[simd_test(enable = "neon")]
8922 unsafe fn test_vgetq_lane_f32() {
8923 let v = f32x4::new(0.0, 1.0, 2.0, 3.0);
8924 let r = vgetq_lane_f32::<3>(transmute(v));
8925 assert_eq!(r, 3.0);
8926 let r = vgetq_lane_f32::<0>(transmute(v));
8927 assert_eq!(r, 0.0);
8928 let r = vgetq_lane_f32::<2>(transmute(v));
8929 assert_eq!(r, 2.0);
8930 let r = vgetq_lane_f32::<1>(transmute(v));
8931 assert_eq!(r, 1.0);
8932 }
8933
8934 #[simd_test(enable = "neon")]
8935 unsafe fn test_vgetq_lane_s64() {
8936 let v = i64x2::new(0, 1);
8937 let r = vgetq_lane_s64::<1>(transmute(v));
8938 assert_eq!(r, 1);
8939 let r = vgetq_lane_s64::<0>(transmute(v));
8940 assert_eq!(r, 0);
8941 }
8942
8943 #[simd_test(enable = "neon")]
8944 unsafe fn test_vgetq_lane_p64() {
8945 let v = u64x2::new(0, 1);
8946 let r = vgetq_lane_p64::<1>(transmute(v));
8947 assert_eq!(r, 1);
8948 let r = vgetq_lane_p64::<0>(transmute(v));
8949 assert_eq!(r, 0);
8950 }
8951
8952 #[simd_test(enable = "neon")]
8953 unsafe fn test_vext_s64() {
8954 let a: i64x1 = i64x1::new(0);
8955 let b: i64x1 = i64x1::new(1);
8956 let e: i64x1 = i64x1::new(0);
8957 let r: i64x1 = transmute(vext_s64::<0>(transmute(a), transmute(b)));
8958 assert_eq!(r, e);
8959 }
8960
8961 #[simd_test(enable = "neon")]
8962 unsafe fn test_vext_u64() {
8963 let a: u64x1 = u64x1::new(0);
8964 let b: u64x1 = u64x1::new(1);
8965 let e: u64x1 = u64x1::new(0);
8966 let r: u64x1 = transmute(vext_u64::<0>(transmute(a), transmute(b)));
8967 assert_eq!(r, e);
8968 }
8969
8970 #[simd_test(enable = "neon")]
8971 unsafe fn test_vget_high_s8() {
8972 let a = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
8973 let e = i8x8::new(9, 10, 11, 12, 13, 14, 15, 16);
8974 let r: i8x8 = transmute(vget_high_s8(transmute(a)));
8975 assert_eq!(r, e);
8976 }
8977
8978 #[simd_test(enable = "neon")]
8979 unsafe fn test_vget_high_s16() {
8980 let a = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
8981 let e = i16x4::new(5, 6, 7, 8);
8982 let r: i16x4 = transmute(vget_high_s16(transmute(a)));
8983 assert_eq!(r, e);
8984 }
8985
8986 #[simd_test(enable = "neon")]
8987 unsafe fn test_vget_high_s32() {
8988 let a = i32x4::new(1, 2, 3, 4);
8989 let e = i32x2::new(3, 4);
8990 let r: i32x2 = transmute(vget_high_s32(transmute(a)));
8991 assert_eq!(r, e);
8992 }
8993
8994 #[simd_test(enable = "neon")]
8995 unsafe fn test_vget_high_s64() {
8996 let a = i64x2::new(1, 2);
8997 let e = i64x1::new(2);
8998 let r: i64x1 = transmute(vget_high_s64(transmute(a)));
8999 assert_eq!(r, e);
9000 }
9001
9002 #[simd_test(enable = "neon")]
9003 unsafe fn test_vget_high_u8() {
9004 let a = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
9005 let e = u8x8::new(9, 10, 11, 12, 13, 14, 15, 16);
9006 let r: u8x8 = transmute(vget_high_u8(transmute(a)));
9007 assert_eq!(r, e);
9008 }
9009
9010 #[simd_test(enable = "neon")]
9011 unsafe fn test_vget_high_u16() {
9012 let a = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
9013 let e = u16x4::new(5, 6, 7, 8);
9014 let r: u16x4 = transmute(vget_high_u16(transmute(a)));
9015 assert_eq!(r, e);
9016 }
9017
9018 #[simd_test(enable = "neon")]
9019 unsafe fn test_vget_high_u32() {
9020 let a = u32x4::new(1, 2, 3, 4);
9021 let e = u32x2::new(3, 4);
9022 let r: u32x2 = transmute(vget_high_u32(transmute(a)));
9023 assert_eq!(r, e);
9024 }
9025
9026 #[simd_test(enable = "neon")]
9027 unsafe fn test_vget_high_u64() {
9028 let a = u64x2::new(1, 2);
9029 let e = u64x1::new(2);
9030 let r: u64x1 = transmute(vget_high_u64(transmute(a)));
9031 assert_eq!(r, e);
9032 }
9033
9034 #[simd_test(enable = "neon")]
9035 unsafe fn test_vget_high_p8() {
9036 let a = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
9037 let e = u8x8::new(9, 10, 11, 12, 13, 14, 15, 16);
9038 let r: u8x8 = transmute(vget_high_p8(transmute(a)));
9039 assert_eq!(r, e);
9040 }
9041
9042 #[simd_test(enable = "neon")]
9043 unsafe fn test_vget_high_p16() {
9044 let a = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
9045 let e = u16x4::new(5, 6, 7, 8);
9046 let r: u16x4 = transmute(vget_high_p16(transmute(a)));
9047 assert_eq!(r, e);
9048 }
9049
9050 #[simd_test(enable = "neon")]
9051 unsafe fn test_vget_high_f32() {
9052 let a = f32x4::new(1.0, 2.0, 3.0, 4.0);
9053 let e = f32x2::new(3.0, 4.0);
9054 let r: f32x2 = transmute(vget_high_f32(transmute(a)));
9055 assert_eq!(r, e);
9056 }
9057
9058 #[simd_test(enable = "neon")]
9059 unsafe fn test_vget_low_s8() {
9060 let a = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
9061 let e = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
9062 let r: i8x8 = transmute(vget_low_s8(transmute(a)));
9063 assert_eq!(r, e);
9064 }
9065
9066 #[simd_test(enable = "neon")]
9067 unsafe fn test_vget_low_s16() {
9068 let a = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
9069 let e = i16x4::new(1, 2, 3, 4);
9070 let r: i16x4 = transmute(vget_low_s16(transmute(a)));
9071 assert_eq!(r, e);
9072 }
9073
9074 #[simd_test(enable = "neon")]
9075 unsafe fn test_vget_low_s32() {
9076 let a = i32x4::new(1, 2, 3, 4);
9077 let e = i32x2::new(1, 2);
9078 let r: i32x2 = transmute(vget_low_s32(transmute(a)));
9079 assert_eq!(r, e);
9080 }
9081
9082 #[simd_test(enable = "neon")]
9083 unsafe fn test_vget_low_s64() {
9084 let a = i64x2::new(1, 2);
9085 let e = i64x1::new(1);
9086 let r: i64x1 = transmute(vget_low_s64(transmute(a)));
9087 assert_eq!(r, e);
9088 }
9089
9090 #[simd_test(enable = "neon")]
9091 unsafe fn test_vget_low_u8() {
9092 let a = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
9093 let e = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
9094 let r: u8x8 = transmute(vget_low_u8(transmute(a)));
9095 assert_eq!(r, e);
9096 }
9097
9098 #[simd_test(enable = "neon")]
9099 unsafe fn test_vget_low_u16() {
9100 let a = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
9101 let e = u16x4::new(1, 2, 3, 4);
9102 let r: u16x4 = transmute(vget_low_u16(transmute(a)));
9103 assert_eq!(r, e);
9104 }
9105
9106 #[simd_test(enable = "neon")]
9107 unsafe fn test_vget_low_u32() {
9108 let a = u32x4::new(1, 2, 3, 4);
9109 let e = u32x2::new(1, 2);
9110 let r: u32x2 = transmute(vget_low_u32(transmute(a)));
9111 assert_eq!(r, e);
9112 }
9113
9114 #[simd_test(enable = "neon")]
9115 unsafe fn test_vget_low_u64() {
9116 let a = u64x2::new(1, 2);
9117 let e = u64x1::new(1);
9118 let r: u64x1 = transmute(vget_low_u64(transmute(a)));
9119 assert_eq!(r, e);
9120 }
9121
9122 #[simd_test(enable = "neon")]
9123 unsafe fn test_vget_low_p8() {
9124 let a = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
9125 let e = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
9126 let r: u8x8 = transmute(vget_low_p8(transmute(a)));
9127 assert_eq!(r, e);
9128 }
9129
9130 #[simd_test(enable = "neon")]
9131 unsafe fn test_vget_low_p16() {
9132 let a = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
9133 let e = u16x4::new(1, 2, 3, 4);
9134 let r: u16x4 = transmute(vget_low_p16(transmute(a)));
9135 assert_eq!(r, e);
9136 }
9137
9138 #[simd_test(enable = "neon")]
9139 unsafe fn test_vget_low_f32() {
9140 let a = f32x4::new(1.0, 2.0, 3.0, 4.0);
9141 let e = f32x2::new(1.0, 2.0);
9142 let r: f32x2 = transmute(vget_low_f32(transmute(a)));
9143 assert_eq!(r, e);
9144 }
9145
9146 #[simd_test(enable = "neon")]
9147 unsafe fn test_vdupq_n_s8() {
9148 let v: i8 = 42;
9149 let e = i8x16::new(
9150 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42,
9151 );
9152 let r: i8x16 = transmute(vdupq_n_s8(v));
9153 assert_eq!(r, e);
9154 }
9155
9156 #[simd_test(enable = "neon")]
9157 unsafe fn test_vdupq_n_s16() {
9158 let v: i16 = 64;
9159 let e = i16x8::new(64, 64, 64, 64, 64, 64, 64, 64);
9160 let r: i16x8 = transmute(vdupq_n_s16(v));
9161 assert_eq!(r, e);
9162 }
9163
9164 #[simd_test(enable = "neon")]
9165 unsafe fn test_vdupq_n_s32() {
9166 let v: i32 = 64;
9167 let e = i32x4::new(64, 64, 64, 64);
9168 let r: i32x4 = transmute(vdupq_n_s32(v));
9169 assert_eq!(r, e);
9170 }
9171
9172 #[simd_test(enable = "neon")]
9173 unsafe fn test_vdupq_n_s64() {
9174 let v: i64 = 64;
9175 let e = i64x2::new(64, 64);
9176 let r: i64x2 = transmute(vdupq_n_s64(v));
9177 assert_eq!(r, e);
9178 }
9179
9180 #[simd_test(enable = "neon")]
9181 unsafe fn test_vdupq_n_u8() {
9182 let v: u8 = 64;
9183 let e = u8x16::new(
9184 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64,
9185 );
9186 let r: u8x16 = transmute(vdupq_n_u8(v));
9187 assert_eq!(r, e);
9188 }
9189
9190 #[simd_test(enable = "neon")]
9191 unsafe fn test_vdupq_n_u16() {
9192 let v: u16 = 64;
9193 let e = u16x8::new(64, 64, 64, 64, 64, 64, 64, 64);
9194 let r: u16x8 = transmute(vdupq_n_u16(v));
9195 assert_eq!(r, e);
9196 }
9197
9198 #[simd_test(enable = "neon")]
9199 unsafe fn test_vdupq_n_u32() {
9200 let v: u32 = 64;
9201 let e = u32x4::new(64, 64, 64, 64);
9202 let r: u32x4 = transmute(vdupq_n_u32(v));
9203 assert_eq!(r, e);
9204 }
9205
9206 #[simd_test(enable = "neon")]
9207 unsafe fn test_vdupq_n_u64() {
9208 let v: u64 = 64;
9209 let e = u64x2::new(64, 64);
9210 let r: u64x2 = transmute(vdupq_n_u64(v));
9211 assert_eq!(r, e);
9212 }
9213
9214 #[simd_test(enable = "neon")]
9215 unsafe fn test_vdupq_n_p8() {
9216 let v: p8 = 64;
9217 let e = u8x16::new(
9218 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64,
9219 );
9220 let r: u8x16 = transmute(vdupq_n_p8(v));
9221 assert_eq!(r, e);
9222 }
9223
9224 #[simd_test(enable = "neon")]
9225 unsafe fn test_vdupq_n_p16() {
9226 let v: p16 = 64;
9227 let e = u16x8::new(64, 64, 64, 64, 64, 64, 64, 64);
9228 let r: u16x8 = transmute(vdupq_n_p16(v));
9229 assert_eq!(r, e);
9230 }
9231
9232 #[simd_test(enable = "neon")]
9233 unsafe fn test_vdupq_n_f32() {
9234 let v: f32 = 64.0;
9235 let e = f32x4::new(64.0, 64.0, 64.0, 64.0);
9236 let r: f32x4 = transmute(vdupq_n_f32(v));
9237 assert_eq!(r, e);
9238 }
9239
9240 #[simd_test(enable = "neon")]
9241 unsafe fn test_vdup_n_s8() {
9242 let v: i8 = 64;
9243 let e = i8x8::new(64, 64, 64, 64, 64, 64, 64, 64);
9244 let r: i8x8 = transmute(vdup_n_s8(v));
9245 assert_eq!(r, e);
9246 }
9247
9248 #[simd_test(enable = "neon")]
9249 unsafe fn test_vdup_n_s16() {
9250 let v: i16 = 64;
9251 let e = i16x4::new(64, 64, 64, 64);
9252 let r: i16x4 = transmute(vdup_n_s16(v));
9253 assert_eq!(r, e);
9254 }
9255
9256 #[simd_test(enable = "neon")]
9257 unsafe fn test_vdup_n_s32() {
9258 let v: i32 = 64;
9259 let e = i32x2::new(64, 64);
9260 let r: i32x2 = transmute(vdup_n_s32(v));
9261 assert_eq!(r, e);
9262 }
9263
9264 #[simd_test(enable = "neon")]
9265 unsafe fn test_vdup_n_s64() {
9266 let v: i64 = 64;
9267 let e = i64x1::new(64);
9268 let r: i64x1 = transmute(vdup_n_s64(v));
9269 assert_eq!(r, e);
9270 }
9271
9272 #[simd_test(enable = "neon")]
9273 unsafe fn test_vdup_n_u8() {
9274 let v: u8 = 64;
9275 let e = u8x8::new(64, 64, 64, 64, 64, 64, 64, 64);
9276 let r: u8x8 = transmute(vdup_n_u8(v));
9277 assert_eq!(r, e);
9278 }
9279
9280 #[simd_test(enable = "neon")]
9281 unsafe fn test_vdup_n_u16() {
9282 let v: u16 = 64;
9283 let e = u16x4::new(64, 64, 64, 64);
9284 let r: u16x4 = transmute(vdup_n_u16(v));
9285 assert_eq!(r, e);
9286 }
9287
9288 #[simd_test(enable = "neon")]
9289 unsafe fn test_vdup_n_u32() {
9290 let v: u32 = 64;
9291 let e = u32x2::new(64, 64);
9292 let r: u32x2 = transmute(vdup_n_u32(v));
9293 assert_eq!(r, e);
9294 }
9295
9296 #[simd_test(enable = "neon")]
9297 unsafe fn test_vdup_n_u64() {
9298 let v: u64 = 64;
9299 let e = u64x1::new(64);
9300 let r: u64x1 = transmute(vdup_n_u64(v));
9301 assert_eq!(r, e);
9302 }
9303
9304 #[simd_test(enable = "neon")]
9305 unsafe fn test_vdup_n_p8() {
9306 let v: p8 = 64;
9307 let e = u8x8::new(64, 64, 64, 64, 64, 64, 64, 64);
9308 let r: u8x8 = transmute(vdup_n_p8(v));
9309 assert_eq!(r, e);
9310 }
9311
9312 #[simd_test(enable = "neon")]
9313 unsafe fn test_vdup_n_p16() {
9314 let v: p16 = 64;
9315 let e = u16x4::new(64, 64, 64, 64);
9316 let r: u16x4 = transmute(vdup_n_p16(v));
9317 assert_eq!(r, e);
9318 }
9319
9320 #[simd_test(enable = "neon")]
9321 unsafe fn test_vdup_n_f32() {
9322 let v: f32 = 64.0;
9323 let e = f32x2::new(64.0, 64.0);
9324 let r: f32x2 = transmute(vdup_n_f32(v));
9325 assert_eq!(r, e);
9326 }
9327
9328 #[simd_test(enable = "neon")]
9329 unsafe fn test_vldrq_p128() {
9330 let v: [p128; 2] = [1, 2];
9331 let e: p128 = 2;
9332 let r: p128 = vldrq_p128(v[1..].as_ptr());
9333 assert_eq!(r, e);
9334 }
9335
9336 #[simd_test(enable = "neon")]
9337 unsafe fn test_vstrq_p128() {
9338 let v: [p128; 2] = [1, 2];
9339 let e: p128 = 2;
9340 let mut r: p128 = 1;
9341 vstrq_p128(&mut r, v[1]);
9342 assert_eq!(r, e);
9343 }
9344
9345 #[simd_test(enable = "neon")]
9346 unsafe fn test_vmov_n_s8() {
9347 let v: i8 = 64;
9348 let e = i8x8::new(64, 64, 64, 64, 64, 64, 64, 64);
9349 let r: i8x8 = transmute(vmov_n_s8(v));
9350 assert_eq!(r, e);
9351 }
9352
9353 #[simd_test(enable = "neon")]
9354 unsafe fn test_vmov_n_s16() {
9355 let v: i16 = 64;
9356 let e = i16x4::new(64, 64, 64, 64);
9357 let r: i16x4 = transmute(vmov_n_s16(v));
9358 assert_eq!(r, e);
9359 }
9360
9361 #[simd_test(enable = "neon")]
9362 unsafe fn test_vmov_n_s32() {
9363 let v: i32 = 64;
9364 let e = i32x2::new(64, 64);
9365 let r: i32x2 = transmute(vmov_n_s32(v));
9366 assert_eq!(r, e);
9367 }
9368
9369 #[simd_test(enable = "neon")]
9370 unsafe fn test_vmov_n_s64() {
9371 let v: i64 = 64;
9372 let e = i64x1::new(64);
9373 let r: i64x1 = transmute(vmov_n_s64(v));
9374 assert_eq!(r, e);
9375 }
9376
9377 #[simd_test(enable = "neon")]
9378 unsafe fn test_vmov_n_u8() {
9379 let v: u8 = 64;
9380 let e = u8x8::new(64, 64, 64, 64, 64, 64, 64, 64);
9381 let r: u8x8 = transmute(vmov_n_u8(v));
9382 assert_eq!(r, e);
9383 }
9384
9385 #[simd_test(enable = "neon")]
9386 unsafe fn test_vmov_n_u16() {
9387 let v: u16 = 64;
9388 let e = u16x4::new(64, 64, 64, 64);
9389 let r: u16x4 = transmute(vmov_n_u16(v));
9390 assert_eq!(r, e);
9391 }
9392
9393 #[simd_test(enable = "neon")]
9394 unsafe fn test_vmov_n_u32() {
9395 let v: u32 = 64;
9396 let e = u32x2::new(64, 64);
9397 let r: u32x2 = transmute(vmov_n_u32(v));
9398 assert_eq!(r, e);
9399 }
9400
9401 #[simd_test(enable = "neon")]
9402 unsafe fn test_vmov_n_u64() {
9403 let v: u64 = 64;
9404 let e = u64x1::new(64);
9405 let r: u64x1 = transmute(vmov_n_u64(v));
9406 assert_eq!(r, e);
9407 }
9408
9409 #[simd_test(enable = "neon")]
9410 unsafe fn test_vmov_n_p8() {
9411 let v: p8 = 64;
9412 let e = u8x8::new(64, 64, 64, 64, 64, 64, 64, 64);
9413 let r: u8x8 = transmute(vmov_n_p8(v));
9414 assert_eq!(r, e);
9415 }
9416
9417 #[simd_test(enable = "neon")]
9418 unsafe fn test_vmov_n_p16() {
9419 let v: p16 = 64;
9420 let e = u16x4::new(64, 64, 64, 64);
9421 let r: u16x4 = transmute(vmov_n_p16(v));
9422 assert_eq!(r, e);
9423 }
9424
9425 #[simd_test(enable = "neon")]
9426 unsafe fn test_vmov_n_f32() {
9427 let v: f32 = 64.0;
9428 let e = f32x2::new(64.0, 64.0);
9429 let r: f32x2 = transmute(vmov_n_f32(v));
9430 assert_eq!(r, e);
9431 }
9432
9433 #[simd_test(enable = "neon")]
9434 unsafe fn test_vmovq_n_s8() {
9435 let v: i8 = 64;
9436 let e = i8x16::new(
9437 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64,
9438 );
9439 let r: i8x16 = transmute(vmovq_n_s8(v));
9440 assert_eq!(r, e);
9441 }
9442
9443 #[simd_test(enable = "neon")]
9444 unsafe fn test_vmovq_n_s16() {
9445 let v: i16 = 64;
9446 let e = i16x8::new(64, 64, 64, 64, 64, 64, 64, 64);
9447 let r: i16x8 = transmute(vmovq_n_s16(v));
9448 assert_eq!(r, e);
9449 }
9450
9451 #[simd_test(enable = "neon")]
9452 unsafe fn test_vmovq_n_s32() {
9453 let v: i32 = 64;
9454 let e = i32x4::new(64, 64, 64, 64);
9455 let r: i32x4 = transmute(vmovq_n_s32(v));
9456 assert_eq!(r, e);
9457 }
9458
9459 #[simd_test(enable = "neon")]
9460 unsafe fn test_vmovq_n_s64() {
9461 let v: i64 = 64;
9462 let e = i64x2::new(64, 64);
9463 let r: i64x2 = transmute(vmovq_n_s64(v));
9464 assert_eq!(r, e);
9465 }
9466
9467 #[simd_test(enable = "neon")]
9468 unsafe fn test_vmovq_n_u8() {
9469 let v: u8 = 64;
9470 let e = u8x16::new(
9471 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64,
9472 );
9473 let r: u8x16 = transmute(vmovq_n_u8(v));
9474 assert_eq!(r, e);
9475 }
9476
9477 #[simd_test(enable = "neon")]
9478 unsafe fn test_vmovq_n_u16() {
9479 let v: u16 = 64;
9480 let e = u16x8::new(64, 64, 64, 64, 64, 64, 64, 64);
9481 let r: u16x8 = transmute(vmovq_n_u16(v));
9482 assert_eq!(r, e);
9483 }
9484
9485 #[simd_test(enable = "neon")]
9486 unsafe fn test_vmovq_n_u32() {
9487 let v: u32 = 64;
9488 let e = u32x4::new(64, 64, 64, 64);
9489 let r: u32x4 = transmute(vmovq_n_u32(v));
9490 assert_eq!(r, e);
9491 }
9492
9493 #[simd_test(enable = "neon")]
9494 unsafe fn test_vmovq_n_u64() {
9495 let v: u64 = 64;
9496 let e = u64x2::new(64, 64);
9497 let r: u64x2 = transmute(vmovq_n_u64(v));
9498 assert_eq!(r, e);
9499 }
9500
9501 #[simd_test(enable = "neon")]
9502 unsafe fn test_vmovq_n_p8() {
9503 let v: p8 = 64;
9504 let e = u8x16::new(
9505 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64,
9506 );
9507 let r: u8x16 = transmute(vmovq_n_p8(v));
9508 assert_eq!(r, e);
9509 }
9510
9511 #[simd_test(enable = "neon")]
9512 unsafe fn test_vmovq_n_p16() {
9513 let v: p16 = 64;
9514 let e = u16x8::new(64, 64, 64, 64, 64, 64, 64, 64);
9515 let r: u16x8 = transmute(vmovq_n_p16(v));
9516 assert_eq!(r, e);
9517 }
9518
9519 #[simd_test(enable = "neon")]
9520 unsafe fn test_vmovq_n_f32() {
9521 let v: f32 = 64.0;
9522 let e = f32x4::new(64.0, 64.0, 64.0, 64.0);
9523 let r: f32x4 = transmute(vmovq_n_f32(v));
9524 assert_eq!(r, e);
9525 }
9526
9527 #[simd_test(enable = "neon")]
9528 unsafe fn test_vgetq_lane_u64() {
9529 let v = i64x2::new(1, 2);
9530 let r = vgetq_lane_u64::<1>(transmute(v));
9531 assert_eq!(r, 2);
9532 }
9533
9534 #[simd_test(enable = "neon")]
9535 unsafe fn test_vadd_s8() {
9536 test_ari_s8(
9537 |i, j| vadd_s8(i, j),
9538 |a: i8, b: i8| -> i8 { a.overflowing_add(b).0 },
9539 );
9540 }
9541 #[simd_test(enable = "neon")]
9542 unsafe fn test_vaddq_s8() {
9543 testq_ari_s8(
9544 |i, j| vaddq_s8(i, j),
9545 |a: i8, b: i8| -> i8 { a.overflowing_add(b).0 },
9546 );
9547 }
9548 #[simd_test(enable = "neon")]
9549 unsafe fn test_vadd_s16() {
9550 test_ari_s16(
9551 |i, j| vadd_s16(i, j),
9552 |a: i16, b: i16| -> i16 { a.overflowing_add(b).0 },
9553 );
9554 }
9555 #[simd_test(enable = "neon")]
9556 unsafe fn test_vaddq_s16() {
9557 testq_ari_s16(
9558 |i, j| vaddq_s16(i, j),
9559 |a: i16, b: i16| -> i16 { a.overflowing_add(b).0 },
9560 );
9561 }
9562 #[simd_test(enable = "neon")]
9563 unsafe fn test_vadd_s32() {
9564 test_ari_s32(
9565 |i, j| vadd_s32(i, j),
9566 |a: i32, b: i32| -> i32 { a.overflowing_add(b).0 },
9567 );
9568 }
9569 #[simd_test(enable = "neon")]
9570 unsafe fn test_vaddq_s32() {
9571 testq_ari_s32(
9572 |i, j| vaddq_s32(i, j),
9573 |a: i32, b: i32| -> i32 { a.overflowing_add(b).0 },
9574 );
9575 }
9576
9577 #[simd_test(enable = "neon")]
9578 unsafe fn test_vadd_u8() {
9579 test_ari_u8(
9580 |i, j| vadd_u8(i, j),
9581 |a: u8, b: u8| -> u8 { a.overflowing_add(b).0 },
9582 );
9583 }
9584 #[simd_test(enable = "neon")]
9585 unsafe fn test_vaddq_u8() {
9586 testq_ari_u8(
9587 |i, j| vaddq_u8(i, j),
9588 |a: u8, b: u8| -> u8 { a.overflowing_add(b).0 },
9589 );
9590 }
9591 #[simd_test(enable = "neon")]
9592 unsafe fn test_vadd_u16() {
9593 test_ari_u16(
9594 |i, j| vadd_u16(i, j),
9595 |a: u16, b: u16| -> u16 { a.overflowing_add(b).0 },
9596 );
9597 }
9598 #[simd_test(enable = "neon")]
9599 unsafe fn test_vaddq_u16() {
9600 testq_ari_u16(
9601 |i, j| vaddq_u16(i, j),
9602 |a: u16, b: u16| -> u16 { a.overflowing_add(b).0 },
9603 );
9604 }
9605 #[simd_test(enable = "neon")]
9606 unsafe fn test_vadd_u32() {
9607 test_ari_u32(
9608 |i, j| vadd_u32(i, j),
9609 |a: u32, b: u32| -> u32 { a.overflowing_add(b).0 },
9610 );
9611 }
9612 #[simd_test(enable = "neon")]
9613 unsafe fn test_vaddq_u32() {
9614 testq_ari_u32(
9615 |i, j| vaddq_u32(i, j),
9616 |a: u32, b: u32| -> u32 { a.overflowing_add(b).0 },
9617 );
9618 }
9619
9620 #[simd_test(enable = "neon")]
9621 unsafe fn test_vadd_f32() {
9622 test_ari_f32(|i, j| vadd_f32(i, j), |a: f32, b: f32| -> f32 { a + b });
9623 }
9624 #[simd_test(enable = "neon")]
9625 unsafe fn test_vaddq_f32() {
9626 testq_ari_f32(|i, j| vaddq_f32(i, j), |a: f32, b: f32| -> f32 { a + b });
9627 }
9628
9629 #[simd_test(enable = "neon")]
9630 unsafe fn test_vaddl_s8() {
9631 let v = i8::MAX;
9632 let a = i8x8::new(v, v, v, v, v, v, v, v);
9633 let v = 2 * (v as i16);
9634 let e = i16x8::new(v, v, v, v, v, v, v, v);
9635 let r: i16x8 = transmute(vaddl_s8(transmute(a), transmute(a)));
9636 assert_eq!(r, e);
9637 }
9638
9639 #[simd_test(enable = "neon")]
9640 unsafe fn test_vaddl_s16() {
9641 let v = i16::MAX;
9642 let a = i16x4::new(v, v, v, v);
9643 let v = 2 * (v as i32);
9644 let e = i32x4::new(v, v, v, v);
9645 let r: i32x4 = transmute(vaddl_s16(transmute(a), transmute(a)));
9646 assert_eq!(r, e);
9647 }
9648
9649 #[simd_test(enable = "neon")]
9650 unsafe fn test_vaddl_s32() {
9651 let v = i32::MAX;
9652 let a = i32x2::new(v, v);
9653 let v = 2 * (v as i64);
9654 let e = i64x2::new(v, v);
9655 let r: i64x2 = transmute(vaddl_s32(transmute(a), transmute(a)));
9656 assert_eq!(r, e);
9657 }
9658
9659 #[simd_test(enable = "neon")]
9660 unsafe fn test_vaddl_u8() {
9661 let v = u8::MAX;
9662 let a = u8x8::new(v, v, v, v, v, v, v, v);
9663 let v = 2 * (v as u16);
9664 let e = u16x8::new(v, v, v, v, v, v, v, v);
9665 let r: u16x8 = transmute(vaddl_u8(transmute(a), transmute(a)));
9666 assert_eq!(r, e);
9667 }
9668
9669 #[simd_test(enable = "neon")]
9670 unsafe fn test_vaddl_u16() {
9671 let v = u16::MAX;
9672 let a = u16x4::new(v, v, v, v);
9673 let v = 2 * (v as u32);
9674 let e = u32x4::new(v, v, v, v);
9675 let r: u32x4 = transmute(vaddl_u16(transmute(a), transmute(a)));
9676 assert_eq!(r, e);
9677 }
9678
9679 #[simd_test(enable = "neon")]
9680 unsafe fn test_vaddl_u32() {
9681 let v = u32::MAX;
9682 let a = u32x2::new(v, v);
9683 let v = 2 * (v as u64);
9684 let e = u64x2::new(v, v);
9685 let r: u64x2 = transmute(vaddl_u32(transmute(a), transmute(a)));
9686 assert_eq!(r, e);
9687 }
9688
9689 #[simd_test(enable = "neon")]
9690 unsafe fn test_vaddl_high_s8() {
9691 let a = i8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
9692 let x = i8::MAX;
9693 let b = i8x16::new(x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x);
9694 let x = x as i16;
9695 let e = i16x8::new(x + 8, x + 9, x + 10, x + 11, x + 12, x + 13, x + 14, x + 15);
9696 let r: i16x8 = transmute(vaddl_high_s8(transmute(a), transmute(b)));
9697 assert_eq!(r, e);
9698 }
9699
9700 #[simd_test(enable = "neon")]
9701 unsafe fn test_vaddl_high_s16() {
9702 let a = i16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
9703 let x = i16::MAX;
9704 let b = i16x8::new(x, x, x, x, x, x, x, x);
9705 let x = x as i32;
9706 let e = i32x4::new(x + 4, x + 5, x + 6, x + 7);
9707 let r: i32x4 = transmute(vaddl_high_s16(transmute(a), transmute(b)));
9708 assert_eq!(r, e);
9709 }
9710
9711 #[simd_test(enable = "neon")]
9712 unsafe fn test_vaddl_high_s32() {
9713 let a = i32x4::new(0, 1, 2, 3);
9714 let x = i32::MAX;
9715 let b = i32x4::new(x, x, x, x);
9716 let x = x as i64;
9717 let e = i64x2::new(x + 2, x + 3);
9718 let r: i64x2 = transmute(vaddl_high_s32(transmute(a), transmute(b)));
9719 assert_eq!(r, e);
9720 }
9721
9722 #[simd_test(enable = "neon")]
9723 unsafe fn test_vaddl_high_u8() {
9724 let a = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
9725 let x = u8::MAX;
9726 let b = u8x16::new(x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x);
9727 let x = x as u16;
9728 let e = u16x8::new(x + 8, x + 9, x + 10, x + 11, x + 12, x + 13, x + 14, x + 15);
9729 let r: u16x8 = transmute(vaddl_high_u8(transmute(a), transmute(b)));
9730 assert_eq!(r, e);
9731 }
9732
9733 #[simd_test(enable = "neon")]
9734 unsafe fn test_vaddl_high_u16() {
9735 let a = u16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
9736 let x = u16::MAX;
9737 let b = u16x8::new(x, x, x, x, x, x, x, x);
9738 let x = x as u32;
9739 let e = u32x4::new(x + 4, x + 5, x + 6, x + 7);
9740 let r: u32x4 = transmute(vaddl_high_u16(transmute(a), transmute(b)));
9741 assert_eq!(r, e);
9742 }
9743
9744 #[simd_test(enable = "neon")]
9745 unsafe fn test_vaddl_high_u32() {
9746 let a = u32x4::new(0, 1, 2, 3);
9747 let x = u32::MAX;
9748 let b = u32x4::new(x, x, x, x);
9749 let x = x as u64;
9750 let e = u64x2::new(x + 2, x + 3);
9751 let r: u64x2 = transmute(vaddl_high_u32(transmute(a), transmute(b)));
9752 assert_eq!(r, e);
9753 }
9754
9755 #[simd_test(enable = "neon")]
9756 unsafe fn test_vaddw_s8() {
9757 let x = i16::MAX;
9758 let a = i16x8::new(x, 1, 2, 3, 4, 5, 6, 7);
9759 let y = i8::MAX;
9760 let b = i8x8::new(y, y, y, y, y, y, y, y);
9761 let y = y as i16;
9762 let e = i16x8::new(
9763 x.wrapping_add(y),
9764 1 + y,
9765 2 + y,
9766 3 + y,
9767 4 + y,
9768 5 + y,
9769 6 + y,
9770 7 + y,
9771 );
9772 let r: i16x8 = transmute(vaddw_s8(transmute(a), transmute(b)));
9773 assert_eq!(r, e);
9774 }
9775
9776 #[simd_test(enable = "neon")]
9777 unsafe fn test_vaddw_s16() {
9778 let x = i32::MAX;
9779 let a = i32x4::new(x, 1, 2, 3);
9780 let y = i16::MAX;
9781 let b = i16x4::new(y, y, y, y);
9782 let y = y as i32;
9783 let e = i32x4::new(x.wrapping_add(y), 1 + y, 2 + y, 3 + y);
9784 let r: i32x4 = transmute(vaddw_s16(transmute(a), transmute(b)));
9785 assert_eq!(r, e);
9786 }
9787
9788 #[simd_test(enable = "neon")]
9789 unsafe fn test_vaddw_s32() {
9790 let x = i64::MAX;
9791 let a = i64x2::new(x, 1);
9792 let y = i32::MAX;
9793 let b = i32x2::new(y, y);
9794 let y = y as i64;
9795 let e = i64x2::new(x.wrapping_add(y), 1 + y);
9796 let r: i64x2 = transmute(vaddw_s32(transmute(a), transmute(b)));
9797 assert_eq!(r, e);
9798 }
9799
9800 #[simd_test(enable = "neon")]
9801 unsafe fn test_vaddw_u8() {
9802 let x = u16::MAX;
9803 let a = u16x8::new(x, 1, 2, 3, 4, 5, 6, 7);
9804 let y = u8::MAX;
9805 let b = u8x8::new(y, y, y, y, y, y, y, y);
9806 let y = y as u16;
9807 let e = u16x8::new(
9808 x.wrapping_add(y),
9809 1 + y,
9810 2 + y,
9811 3 + y,
9812 4 + y,
9813 5 + y,
9814 6 + y,
9815 7 + y,
9816 );
9817 let r: u16x8 = transmute(vaddw_u8(transmute(a), transmute(b)));
9818 assert_eq!(r, e);
9819 }
9820
9821 #[simd_test(enable = "neon")]
9822 unsafe fn test_vaddw_u16() {
9823 let x = u32::MAX;
9824 let a = u32x4::new(x, 1, 2, 3);
9825 let y = u16::MAX;
9826 let b = u16x4::new(y, y, y, y);
9827 let y = y as u32;
9828 let e = u32x4::new(x.wrapping_add(y), 1 + y, 2 + y, 3 + y);
9829 let r: u32x4 = transmute(vaddw_u16(transmute(a), transmute(b)));
9830 assert_eq!(r, e);
9831 }
9832
9833 #[simd_test(enable = "neon")]
9834 unsafe fn test_vaddw_u32() {
9835 let x = u64::MAX;
9836 let a = u64x2::new(x, 1);
9837 let y = u32::MAX;
9838 let b = u32x2::new(y, y);
9839 let y = y as u64;
9840 let e = u64x2::new(x.wrapping_add(y), 1 + y);
9841 let r: u64x2 = transmute(vaddw_u32(transmute(a), transmute(b)));
9842 assert_eq!(r, e);
9843 }
9844
9845 #[simd_test(enable = "neon")]
9846 unsafe fn test_vaddw_high_s8() {
9847 let x = i16::MAX;
9848 let a = i16x8::new(x, 1, 2, 3, 4, 5, 6, 7);
9849 let y = i8::MAX;
9850 let b = i8x16::new(0, 0, 0, 0, 0, 0, 0, 0, y, y, y, y, y, y, y, y);
9851 let y = y as i16;
9852 let e = i16x8::new(
9853 x.wrapping_add(y),
9854 1 + y,
9855 2 + y,
9856 3 + y,
9857 4 + y,
9858 5 + y,
9859 6 + y,
9860 7 + y,
9861 );
9862 let r: i16x8 = transmute(vaddw_high_s8(transmute(a), transmute(b)));
9863 assert_eq!(r, e);
9864 }
9865
9866 #[simd_test(enable = "neon")]
9867 unsafe fn test_vaddw_high_s16() {
9868 let x = i32::MAX;
9869 let a = i32x4::new(x, 1, 2, 3);
9870 let y = i16::MAX;
9871 let b = i16x8::new(0, 0, 0, 0, y, y, y, y);
9872 let y = y as i32;
9873 let e = i32x4::new(x.wrapping_add(y), 1 + y, 2 + y, 3 + y);
9874 let r: i32x4 = transmute(vaddw_high_s16(transmute(a), transmute(b)));
9875 assert_eq!(r, e);
9876 }
9877
9878 #[simd_test(enable = "neon")]
9879 unsafe fn test_vaddw_high_s32() {
9880 let x = i64::MAX;
9881 let a = i64x2::new(x, 1);
9882 let y = i32::MAX;
9883 let b = i32x4::new(0, 0, y, y);
9884 let y = y as i64;
9885 let e = i64x2::new(x.wrapping_add(y), 1 + y);
9886 let r: i64x2 = transmute(vaddw_high_s32(transmute(a), transmute(b)));
9887 assert_eq!(r, e);
9888 }
9889
9890 #[simd_test(enable = "neon")]
9891 unsafe fn test_vaddw_high_u8() {
9892 let x = u16::MAX;
9893 let a = u16x8::new(x, 1, 2, 3, 4, 5, 6, 7);
9894 let y = u8::MAX;
9895 let b = u8x16::new(0, 0, 0, 0, 0, 0, 0, 0, y, y, y, y, y, y, y, y);
9896 let y = y as u16;
9897 let e = u16x8::new(
9898 x.wrapping_add(y),
9899 1 + y,
9900 2 + y,
9901 3 + y,
9902 4 + y,
9903 5 + y,
9904 6 + y,
9905 7 + y,
9906 );
9907 let r: u16x8 = transmute(vaddw_high_u8(transmute(a), transmute(b)));
9908 assert_eq!(r, e);
9909 }
9910
9911 #[simd_test(enable = "neon")]
9912 unsafe fn test_vaddw_high_u16() {
9913 let x = u32::MAX;
9914 let a = u32x4::new(x, 1, 2, 3);
9915 let y = u16::MAX;
9916 let b = u16x8::new(0, 0, 0, 0, y, y, y, y);
9917 let y = y as u32;
9918 let e = u32x4::new(x.wrapping_add(y), 1 + y, 2 + y, 3 + y);
9919 let r: u32x4 = transmute(vaddw_high_u16(transmute(a), transmute(b)));
9920 assert_eq!(r, e);
9921 }
9922
9923 #[simd_test(enable = "neon")]
9924 unsafe fn test_vaddw_high_u32() {
9925 let x = u64::MAX;
9926 let a = u64x2::new(x, 1);
9927 let y = u32::MAX;
9928 let b = u32x4::new(0, 0, y, y);
9929 let y = y as u64;
9930 let e = u64x2::new(x.wrapping_add(y), 1 + y);
9931 let r: u64x2 = transmute(vaddw_high_u32(transmute(a), transmute(b)));
9932 assert_eq!(r, e);
9933 }
9934
9935 #[simd_test(enable = "neon")]
9936 unsafe fn test_vmvn_s8() {
9937 let a = i8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
9938 let e = i8x8::new(-1, -2, -3, -4, -5, -6, -7, -8);
9939 let r: i8x8 = transmute(vmvn_s8(transmute(a)));
9940 assert_eq!(r, e);
9941 }
9942
9943 #[simd_test(enable = "neon")]
9944 unsafe fn test_vmvnq_s8() {
9945 let a = i8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
9946 let e = i8x16::new(
9947 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12, -13, -14, -15, -16,
9948 );
9949 let r: i8x16 = transmute(vmvnq_s8(transmute(a)));
9950 assert_eq!(r, e);
9951 }
9952
9953 #[simd_test(enable = "neon")]
9954 unsafe fn test_vmvn_s16() {
9955 let a = i16x4::new(0, 1, 2, 3);
9956 let e = i16x4::new(-1, -2, -3, -4);
9957 let r: i16x4 = transmute(vmvn_s16(transmute(a)));
9958 assert_eq!(r, e);
9959 }
9960
9961 #[simd_test(enable = "neon")]
9962 unsafe fn test_vmvnq_s16() {
9963 let a = i16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
9964 let e = i16x8::new(-1, -2, -3, -4, -5, -6, -7, -8);
9965 let r: i16x8 = transmute(vmvnq_s16(transmute(a)));
9966 assert_eq!(r, e);
9967 }
9968
9969 #[simd_test(enable = "neon")]
9970 unsafe fn test_vmvn_s32() {
9971 let a = i32x2::new(0, 1);
9972 let e = i32x2::new(-1, -2);
9973 let r: i32x2 = transmute(vmvn_s32(transmute(a)));
9974 assert_eq!(r, e);
9975 }
9976
9977 #[simd_test(enable = "neon")]
9978 unsafe fn test_vmvnq_s32() {
9979 let a = i32x4::new(0, 1, 2, 3);
9980 let e = i32x4::new(-1, -2, -3, -4);
9981 let r: i32x4 = transmute(vmvnq_s32(transmute(a)));
9982 assert_eq!(r, e);
9983 }
9984
9985 #[simd_test(enable = "neon")]
9986 unsafe fn test_vmvn_u8() {
9987 let a = u8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
9988 let e = u8x8::new(255, 254, 253, 252, 251, 250, 249, 248);
9989 let r: u8x8 = transmute(vmvn_u8(transmute(a)));
9990 assert_eq!(r, e);
9991 }
9992
9993 #[simd_test(enable = "neon")]
9994 unsafe fn test_vmvnq_u8() {
9995 let a = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
9996 let e = u8x16::new(
9997 255, 254, 253, 252, 251, 250, 249, 248, 247, 246, 245, 244, 243, 242, 241, 240,
9998 );
9999 let r: u8x16 = transmute(vmvnq_u8(transmute(a)));
10000 assert_eq!(r, e);
10001 }
10002
10003 #[simd_test(enable = "neon")]
10004 unsafe fn test_vmvn_u16() {
10005 let a = u16x4::new(0, 1, 2, 3);
10006 let e = u16x4::new(65_535, 65_534, 65_533, 65_532);
10007 let r: u16x4 = transmute(vmvn_u16(transmute(a)));
10008 assert_eq!(r, e);
10009 }
10010
10011 #[simd_test(enable = "neon")]
10012 unsafe fn test_vmvnq_u16() {
10013 let a = u16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
10014 let e = u16x8::new(
10015 65_535, 65_534, 65_533, 65_532, 65_531, 65_530, 65_529, 65_528,
10016 );
10017 let r: u16x8 = transmute(vmvnq_u16(transmute(a)));
10018 assert_eq!(r, e);
10019 }
10020
10021 #[simd_test(enable = "neon")]
10022 unsafe fn test_vmvn_u32() {
10023 let a = u32x2::new(0, 1);
10024 let e = u32x2::new(4_294_967_295, 4_294_967_294);
10025 let r: u32x2 = transmute(vmvn_u32(transmute(a)));
10026 assert_eq!(r, e);
10027 }
10028
10029 #[simd_test(enable = "neon")]
10030 unsafe fn test_vmvnq_u32() {
10031 let a = u32x4::new(0, 1, 2, 3);
10032 let e = u32x4::new(4_294_967_295, 4_294_967_294, 4_294_967_293, 4_294_967_292);
10033 let r: u32x4 = transmute(vmvnq_u32(transmute(a)));
10034 assert_eq!(r, e);
10035 }
10036
10037 #[simd_test(enable = "neon")]
10038 unsafe fn test_vmvn_p8() {
10039 let a = u8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
10040 let e = u8x8::new(255, 254, 253, 252, 251, 250, 249, 248);
10041 let r: u8x8 = transmute(vmvn_p8(transmute(a)));
10042 assert_eq!(r, e);
10043 }
10044
10045 #[simd_test(enable = "neon")]
10046 unsafe fn test_vmvnq_p8() {
10047 let a = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
10048 let e = u8x16::new(
10049 255, 254, 253, 252, 251, 250, 249, 248, 247, 246, 245, 244, 243, 242, 241, 240,
10050 );
10051 let r: u8x16 = transmute(vmvnq_p8(transmute(a)));
10052 assert_eq!(r, e);
10053 }
10054
10055 #[simd_test(enable = "neon")]
10056 unsafe fn test_vbic_s8() {
10057 let a = i8x8::new(0, -1, -2, -3, -4, -5, -6, -7);
10058 let b = i8x8::new(1, 1, 1, 1, 1, 1, 1, 1);
10059 let e = i8x8::new(0, -2, -2, -4, -4, -6, -6, -8);
10060 let r: i8x8 = transmute(vbic_s8(transmute(a), transmute(b)));
10061 assert_eq!(r, e);
10062 }
10063
10064 #[simd_test(enable = "neon")]
10065 unsafe fn test_vbicq_s8() {
10066 let a = i8x16::new(
10067 0, -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12, -13, -14, -15,
10068 );
10069 let b = i8x16::new(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
10070 let e = i8x16::new(
10071 0, -2, -2, -4, -4, -6, -6, -8, -8, -10, -10, -12, -12, -14, -14, -16,
10072 );
10073 let r: i8x16 = transmute(vbicq_s8(transmute(a), transmute(b)));
10074 assert_eq!(r, e);
10075 }
10076
10077 #[simd_test(enable = "neon")]
10078 unsafe fn test_vbic_s16() {
10079 let a = i16x4::new(0, -1, -2, -3);
10080 let b = i16x4::new(1, 1, 1, 1);
10081 let e = i16x4::new(0, -2, -2, -4);
10082 let r: i16x4 = transmute(vbic_s16(transmute(a), transmute(b)));
10083 assert_eq!(r, e);
10084 }
10085
10086 #[simd_test(enable = "neon")]
10087 unsafe fn test_vbicq_s16() {
10088 let a = i16x8::new(0, -1, -2, -3, -4, -5, -6, -7);
10089 let b = i16x8::new(1, 1, 1, 1, 1, 1, 1, 1);
10090 let e = i16x8::new(0, -2, -2, -4, -4, -6, -6, -8);
10091 let r: i16x8 = transmute(vbicq_s16(transmute(a), transmute(b)));
10092 assert_eq!(r, e);
10093 }
10094
10095 #[simd_test(enable = "neon")]
10096 unsafe fn test_vbic_s32() {
10097 let a = i32x2::new(0, -1);
10098 let b = i32x2::new(1, 1);
10099 let e = i32x2::new(0, -2);
10100 let r: i32x2 = transmute(vbic_s32(transmute(a), transmute(b)));
10101 assert_eq!(r, e);
10102 }
10103
10104 #[simd_test(enable = "neon")]
10105 unsafe fn test_vbicq_s32() {
10106 let a = i32x4::new(0, -1, -2, -3);
10107 let b = i32x4::new(1, 1, 1, 1);
10108 let e = i32x4::new(0, -2, -2, -4);
10109 let r: i32x4 = transmute(vbicq_s32(transmute(a), transmute(b)));
10110 assert_eq!(r, e);
10111 }
10112
10113 #[simd_test(enable = "neon")]
10114 unsafe fn test_vbic_s64() {
10115 let a = i64x1::new(-1);
10116 let b = i64x1::new(1);
10117 let e = i64x1::new(-2);
10118 let r: i64x1 = transmute(vbic_s64(transmute(a), transmute(b)));
10119 assert_eq!(r, e);
10120 }
10121
10122 #[simd_test(enable = "neon")]
10123 unsafe fn test_vbicq_s64() {
10124 let a = i64x2::new(0, -1);
10125 let b = i64x2::new(1, 1);
10126 let e = i64x2::new(0, -2);
10127 let r: i64x2 = transmute(vbicq_s64(transmute(a), transmute(b)));
10128 assert_eq!(r, e);
10129 }
10130
10131 #[simd_test(enable = "neon")]
10132 unsafe fn test_vbic_u8() {
10133 let a = u8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
10134 let b = u8x8::new(1, 1, 1, 1, 1, 1, 1, 1);
10135 let e = u8x8::new(0, 0, 2, 2, 4, 4, 6, 6);
10136 let r: u8x8 = transmute(vbic_u8(transmute(a), transmute(b)));
10137 assert_eq!(r, e);
10138 }
10139
10140 #[simd_test(enable = "neon")]
10141 unsafe fn test_vbicq_u8() {
10142 let a = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
10143 let b = u8x16::new(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
10144 let e = u8x16::new(0, 0, 2, 2, 4, 4, 6, 6, 8, 8, 10, 10, 12, 12, 14, 14);
10145 let r: u8x16 = transmute(vbicq_u8(transmute(a), transmute(b)));
10146 assert_eq!(r, e);
10147 }
10148
10149 #[simd_test(enable = "neon")]
10150 unsafe fn test_vbic_u16() {
10151 let a = u16x4::new(0, 1, 2, 3);
10152 let b = u16x4::new(1, 1, 1, 1);
10153 let e = u16x4::new(0, 0, 2, 2);
10154 let r: u16x4 = transmute(vbic_u16(transmute(a), transmute(b)));
10155 assert_eq!(r, e);
10156 }
10157
10158 #[simd_test(enable = "neon")]
10159 unsafe fn test_vbicq_u16() {
10160 let a = u16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
10161 let b = u16x8::new(1, 1, 1, 1, 1, 1, 1, 1);
10162 let e = u16x8::new(0, 0, 2, 2, 4, 4, 6, 6);
10163 let r: u16x8 = transmute(vbicq_u16(transmute(a), transmute(b)));
10164 assert_eq!(r, e);
10165 }
10166
10167 #[simd_test(enable = "neon")]
10168 unsafe fn test_vbic_u32() {
10169 let a = u32x2::new(0, 1);
10170 let b = u32x2::new(1, 1);
10171 let e = u32x2::new(0, 0);
10172 let r: u32x2 = transmute(vbic_u32(transmute(a), transmute(b)));
10173 assert_eq!(r, e);
10174 }
10175
10176 #[simd_test(enable = "neon")]
10177 unsafe fn test_vbicq_u32() {
10178 let a = u32x4::new(0, 1, 2, 3);
10179 let b = u32x4::new(1, 1, 1, 1);
10180 let e = u32x4::new(0, 0, 2, 2);
10181 let r: u32x4 = transmute(vbicq_u32(transmute(a), transmute(b)));
10182 assert_eq!(r, e);
10183 }
10184
10185 #[simd_test(enable = "neon")]
10186 unsafe fn test_vbic_u64() {
10187 let a = u64x1::new(1);
10188 let b = u64x1::new(1);
10189 let e = u64x1::new(0);
10190 let r: u64x1 = transmute(vbic_u64(transmute(a), transmute(b)));
10191 assert_eq!(r, e);
10192 }
10193
10194 #[simd_test(enable = "neon")]
10195 unsafe fn test_vbicq_u64() {
10196 let a = u64x2::new(0, 1);
10197 let b = u64x2::new(1, 1);
10198 let e = u64x2::new(0, 0);
10199 let r: u64x2 = transmute(vbicq_u64(transmute(a), transmute(b)));
10200 assert_eq!(r, e);
10201 }
10202
10203 #[simd_test(enable = "neon")]
10204 unsafe fn test_vbsl_s8() {
10205 let a = u8x8::new(u8::MAX, 1, u8::MAX, 2, u8::MAX, 0, u8::MAX, 0);
10206 let b = i8x8::new(
10207 i8::MAX,
10208 i8::MAX,
10209 i8::MAX,
10210 i8::MAX,
10211 i8::MAX,
10212 i8::MAX,
10213 i8::MAX,
10214 i8::MAX,
10215 );
10216 let c = i8x8::new(
10217 i8::MIN,
10218 i8::MIN,
10219 i8::MIN,
10220 i8::MIN,
10221 i8::MIN,
10222 i8::MIN,
10223 i8::MIN,
10224 i8::MIN,
10225 );
10226 let e = i8x8::new(
10227 i8::MAX,
10228 i8::MIN | 1,
10229 i8::MAX,
10230 i8::MIN | 2,
10231 i8::MAX,
10232 i8::MIN,
10233 i8::MAX,
10234 i8::MIN,
10235 );
10236 let r: i8x8 = transmute(vbsl_s8(transmute(a), transmute(b), transmute(c)));
10237 assert_eq!(r, e);
10238 }
10239 #[simd_test(enable = "neon")]
10240 unsafe fn test_vbsl_s16() {
10241 let a = u16x4::new(u16::MAX, 0, 1, 2);
10242 let b = i16x4::new(i16::MAX, i16::MAX, i16::MAX, i16::MAX);
10243 let c = i16x4::new(i16::MIN, i16::MIN, i16::MIN, i16::MIN);
10244 let e = i16x4::new(i16::MAX, i16::MIN, i16::MIN | 1, i16::MIN | 2);
10245 let r: i16x4 = transmute(vbsl_s16(transmute(a), transmute(b), transmute(c)));
10246 assert_eq!(r, e);
10247 }
10248 #[simd_test(enable = "neon")]
10249 unsafe fn test_vbsl_s32() {
10250 let a = u32x2::new(u32::MAX, 1);
10251 let b = i32x2::new(i32::MAX, i32::MAX);
10252 let c = i32x2::new(i32::MIN, i32::MIN);
10253 let e = i32x2::new(i32::MAX, i32::MIN | 1);
10254 let r: i32x2 = transmute(vbsl_s32(transmute(a), transmute(b), transmute(c)));
10255 assert_eq!(r, e);
10256 }
10257 #[simd_test(enable = "neon")]
10258 unsafe fn test_vbsl_s64() {
10259 let a = u64x1::new(1);
10260 let b = i64x1::new(i64::MAX);
10261 let c = i64x1::new(i64::MIN);
10262 let e = i64x1::new(i64::MIN | 1);
10263 let r: i64x1 = transmute(vbsl_s64(transmute(a), transmute(b), transmute(c)));
10264 assert_eq!(r, e);
10265 }
10266 #[simd_test(enable = "neon")]
10267 unsafe fn test_vbsl_u8() {
10268 let a = u8x8::new(u8::MAX, 1, u8::MAX, 2, u8::MAX, 0, u8::MAX, 0);
10269 let b = u8x8::new(
10270 u8::MAX,
10271 u8::MAX,
10272 u8::MAX,
10273 u8::MAX,
10274 u8::MAX,
10275 u8::MAX,
10276 u8::MAX,
10277 u8::MAX,
10278 );
10279 let c = u8x8::new(
10280 u8::MIN,
10281 u8::MIN,
10282 u8::MIN,
10283 u8::MIN,
10284 u8::MIN,
10285 u8::MIN,
10286 u8::MIN,
10287 u8::MIN,
10288 );
10289 let e = u8x8::new(u8::MAX, 1, u8::MAX, 2, u8::MAX, u8::MIN, u8::MAX, u8::MIN);
10290 let r: u8x8 = transmute(vbsl_u8(transmute(a), transmute(b), transmute(c)));
10291 assert_eq!(r, e);
10292 }
10293 #[simd_test(enable = "neon")]
10294 unsafe fn test_vbsl_u16() {
10295 let a = u16x4::new(u16::MAX, 0, 1, 2);
10296 let b = u16x4::new(u16::MAX, u16::MAX, u16::MAX, u16::MAX);
10297 let c = u16x4::new(u16::MIN, u16::MIN, u16::MIN, u16::MIN);
10298 let e = u16x4::new(u16::MAX, 0, 1, 2);
10299 let r: u16x4 = transmute(vbsl_u16(transmute(a), transmute(b), transmute(c)));
10300 assert_eq!(r, e);
10301 }
10302 #[simd_test(enable = "neon")]
10303 unsafe fn test_vbsl_u32() {
10304 let a = u32x2::new(u32::MAX, 2);
10305 let b = u32x2::new(u32::MAX, u32::MAX);
10306 let c = u32x2::new(u32::MIN, u32::MIN);
10307 let e = u32x2::new(u32::MAX, 2);
10308 let r: u32x2 = transmute(vbsl_u32(transmute(a), transmute(b), transmute(c)));
10309 assert_eq!(r, e);
10310 }
10311 #[simd_test(enable = "neon")]
10312 unsafe fn test_vbsl_u64() {
10313 let a = u64x1::new(2);
10314 let b = u64x1::new(u64::MAX);
10315 let c = u64x1::new(u64::MIN);
10316 let e = u64x1::new(2);
10317 let r: u64x1 = transmute(vbsl_u64(transmute(a), transmute(b), transmute(c)));
10318 assert_eq!(r, e);
10319 }
10320 #[simd_test(enable = "neon")]
10321 unsafe fn test_vbsl_f32() {
10322 let a = u32x2::new(1, 0x80000000);
10323 let b = f32x2::new(8388609f32, -1.23f32);
10324 let c = f32x2::new(2097152f32, 2.34f32);
10325 let e = f32x2::new(2097152.25f32, -2.34f32);
10326 let r: f32x2 = transmute(vbsl_f32(transmute(a), transmute(b), transmute(c)));
10327 assert_eq!(r, e);
10328 }
10329 #[simd_test(enable = "neon")]
10330 unsafe fn test_vbsl_p8() {
10331 let a = u8x8::new(u8::MAX, 1, u8::MAX, 2, u8::MAX, 0, u8::MAX, 0);
10332 let b = u8x8::new(
10333 u8::MAX,
10334 u8::MAX,
10335 u8::MAX,
10336 u8::MAX,
10337 u8::MAX,
10338 u8::MAX,
10339 u8::MAX,
10340 u8::MAX,
10341 );
10342 let c = u8x8::new(
10343 u8::MIN,
10344 u8::MIN,
10345 u8::MIN,
10346 u8::MIN,
10347 u8::MIN,
10348 u8::MIN,
10349 u8::MIN,
10350 u8::MIN,
10351 );
10352 let e = u8x8::new(u8::MAX, 1, u8::MAX, 2, u8::MAX, u8::MIN, u8::MAX, u8::MIN);
10353 let r: u8x8 = transmute(vbsl_p8(transmute(a), transmute(b), transmute(c)));
10354 assert_eq!(r, e);
10355 }
10356 #[simd_test(enable = "neon")]
10357 unsafe fn test_vbsl_p16() {
10358 let a = u16x4::new(u16::MAX, 0, 1, 2);
10359 let b = u16x4::new(u16::MAX, u16::MAX, u16::MAX, u16::MAX);
10360 let c = u16x4::new(u16::MIN, u16::MIN, u16::MIN, u16::MIN);
10361 let e = u16x4::new(u16::MAX, 0, 1, 2);
10362 let r: u16x4 = transmute(vbsl_p16(transmute(a), transmute(b), transmute(c)));
10363 assert_eq!(r, e);
10364 }
10365 #[simd_test(enable = "neon")]
10366 unsafe fn test_vbslq_s8() {
10367 let a = u8x16::new(
10368 u8::MAX,
10369 1,
10370 u8::MAX,
10371 2,
10372 u8::MAX,
10373 0,
10374 u8::MAX,
10375 0,
10376 u8::MAX,
10377 0,
10378 u8::MAX,
10379 0,
10380 u8::MAX,
10381 0,
10382 u8::MAX,
10383 0,
10384 );
10385 let b = i8x16::new(
10386 i8::MAX,
10387 i8::MAX,
10388 i8::MAX,
10389 i8::MAX,
10390 i8::MAX,
10391 i8::MAX,
10392 i8::MAX,
10393 i8::MAX,
10394 i8::MAX,
10395 i8::MAX,
10396 i8::MAX,
10397 i8::MAX,
10398 i8::MAX,
10399 i8::MAX,
10400 i8::MAX,
10401 i8::MAX,
10402 );
10403 let c = i8x16::new(
10404 i8::MIN,
10405 i8::MIN,
10406 i8::MIN,
10407 i8::MIN,
10408 i8::MIN,
10409 i8::MIN,
10410 i8::MIN,
10411 i8::MIN,
10412 i8::MIN,
10413 i8::MIN,
10414 i8::MIN,
10415 i8::MIN,
10416 i8::MIN,
10417 i8::MIN,
10418 i8::MIN,
10419 i8::MIN,
10420 );
10421 let e = i8x16::new(
10422 i8::MAX,
10423 i8::MIN | 1,
10424 i8::MAX,
10425 i8::MIN | 2,
10426 i8::MAX,
10427 i8::MIN,
10428 i8::MAX,
10429 i8::MIN,
10430 i8::MAX,
10431 i8::MIN,
10432 i8::MAX,
10433 i8::MIN,
10434 i8::MAX,
10435 i8::MIN,
10436 i8::MAX,
10437 i8::MIN,
10438 );
10439 let r: i8x16 = transmute(vbslq_s8(transmute(a), transmute(b), transmute(c)));
10440 assert_eq!(r, e);
10441 }
10442 #[simd_test(enable = "neon")]
10443 unsafe fn test_vbslq_s16() {
10444 let a = u16x8::new(u16::MAX, 1, u16::MAX, 2, u16::MAX, 0, u16::MAX, 0);
10445 let b = i16x8::new(
10446 i16::MAX,
10447 i16::MAX,
10448 i16::MAX,
10449 i16::MAX,
10450 i16::MAX,
10451 i16::MAX,
10452 i16::MAX,
10453 i16::MAX,
10454 );
10455 let c = i16x8::new(
10456 i16::MIN,
10457 i16::MIN,
10458 i16::MIN,
10459 i16::MIN,
10460 i16::MIN,
10461 i16::MIN,
10462 i16::MIN,
10463 i16::MIN,
10464 );
10465 let e = i16x8::new(
10466 i16::MAX,
10467 i16::MIN | 1,
10468 i16::MAX,
10469 i16::MIN | 2,
10470 i16::MAX,
10471 i16::MIN,
10472 i16::MAX,
10473 i16::MIN,
10474 );
10475 let r: i16x8 = transmute(vbslq_s16(transmute(a), transmute(b), transmute(c)));
10476 assert_eq!(r, e);
10477 }
10478 #[simd_test(enable = "neon")]
10479 unsafe fn test_vbslq_s32() {
10480 let a = u32x4::new(u32::MAX, 1, u32::MAX, 2);
10481 let b = i32x4::new(i32::MAX, i32::MAX, i32::MAX, i32::MAX);
10482 let c = i32x4::new(i32::MIN, i32::MIN, i32::MIN, i32::MIN);
10483 let e = i32x4::new(i32::MAX, i32::MIN | 1, i32::MAX, i32::MIN | 2);
10484 let r: i32x4 = transmute(vbslq_s32(transmute(a), transmute(b), transmute(c)));
10485 assert_eq!(r, e);
10486 }
10487 #[simd_test(enable = "neon")]
10488 unsafe fn test_vbslq_s64() {
10489 let a = u64x2::new(u64::MAX, 1);
10490 let b = i64x2::new(i64::MAX, i64::MAX);
10491 let c = i64x2::new(i64::MIN, i64::MIN);
10492 let e = i64x2::new(i64::MAX, i64::MIN | 1);
10493 let r: i64x2 = transmute(vbslq_s64(transmute(a), transmute(b), transmute(c)));
10494 assert_eq!(r, e);
10495 }
10496 #[simd_test(enable = "neon")]
10497 unsafe fn test_vbslq_u8() {
10498 let a = u8x16::new(
10499 u8::MAX,
10500 1,
10501 u8::MAX,
10502 2,
10503 u8::MAX,
10504 0,
10505 u8::MAX,
10506 0,
10507 u8::MAX,
10508 0,
10509 u8::MAX,
10510 0,
10511 u8::MAX,
10512 0,
10513 u8::MAX,
10514 0,
10515 );
10516 let b = u8x16::new(
10517 u8::MAX,
10518 u8::MAX,
10519 u8::MAX,
10520 u8::MAX,
10521 u8::MAX,
10522 u8::MAX,
10523 u8::MAX,
10524 u8::MAX,
10525 u8::MAX,
10526 u8::MAX,
10527 u8::MAX,
10528 u8::MAX,
10529 u8::MAX,
10530 u8::MAX,
10531 u8::MAX,
10532 u8::MAX,
10533 );
10534 let c = u8x16::new(
10535 u8::MIN,
10536 u8::MIN,
10537 u8::MIN,
10538 u8::MIN,
10539 u8::MIN,
10540 u8::MIN,
10541 u8::MIN,
10542 u8::MIN,
10543 u8::MIN,
10544 u8::MIN,
10545 u8::MIN,
10546 u8::MIN,
10547 u8::MIN,
10548 u8::MIN,
10549 u8::MIN,
10550 u8::MIN,
10551 );
10552 let e = u8x16::new(
10553 u8::MAX,
10554 1,
10555 u8::MAX,
10556 2,
10557 u8::MAX,
10558 u8::MIN,
10559 u8::MAX,
10560 u8::MIN,
10561 u8::MAX,
10562 u8::MIN,
10563 u8::MAX,
10564 u8::MIN,
10565 u8::MAX,
10566 u8::MIN,
10567 u8::MAX,
10568 u8::MIN,
10569 );
10570 let r: u8x16 = transmute(vbslq_u8(transmute(a), transmute(b), transmute(c)));
10571 assert_eq!(r, e);
10572 }
10573 #[simd_test(enable = "neon")]
10574 unsafe fn test_vbslq_u16() {
10575 let a = u16x8::new(u16::MAX, 1, u16::MAX, 2, u16::MAX, 0, u16::MAX, 0);
10576 let b = u16x8::new(
10577 u16::MAX,
10578 u16::MAX,
10579 u16::MAX,
10580 u16::MAX,
10581 u16::MAX,
10582 u16::MAX,
10583 u16::MAX,
10584 u16::MAX,
10585 );
10586 let c = u16x8::new(
10587 u16::MIN,
10588 u16::MIN,
10589 u16::MIN,
10590 u16::MIN,
10591 u16::MIN,
10592 u16::MIN,
10593 u16::MIN,
10594 u16::MIN,
10595 );
10596 let e = u16x8::new(
10597 u16::MAX,
10598 1,
10599 u16::MAX,
10600 2,
10601 u16::MAX,
10602 u16::MIN,
10603 u16::MAX,
10604 u16::MIN,
10605 );
10606 let r: u16x8 = transmute(vbslq_u16(transmute(a), transmute(b), transmute(c)));
10607 assert_eq!(r, e);
10608 }
10609 #[simd_test(enable = "neon")]
10610 unsafe fn test_vbslq_u32() {
10611 let a = u32x4::new(u32::MAX, 1, u32::MAX, 2);
10612 let b = u32x4::new(u32::MAX, u32::MAX, u32::MAX, u32::MAX);
10613 let c = u32x4::new(u32::MIN, u32::MIN, u32::MIN, u32::MIN);
10614 let e = u32x4::new(u32::MAX, 1, u32::MAX, 2);
10615 let r: u32x4 = transmute(vbslq_u32(transmute(a), transmute(b), transmute(c)));
10616 assert_eq!(r, e);
10617 }
10618 #[simd_test(enable = "neon")]
10619 unsafe fn test_vbslq_u64() {
10620 let a = u64x2::new(u64::MAX, 1);
10621 let b = u64x2::new(u64::MAX, u64::MAX);
10622 let c = u64x2::new(u64::MIN, u64::MIN);
10623 let e = u64x2::new(u64::MAX, 1);
10624 let r: u64x2 = transmute(vbslq_u64(transmute(a), transmute(b), transmute(c)));
10625 assert_eq!(r, e);
10626 }
10627 #[simd_test(enable = "neon")]
10628 unsafe fn test_vbslq_f32() {
10629 let a = u32x4::new(u32::MAX, 0, 1, 0x80000000);
10630 let b = f32x4::new(-1.23f32, -1.23f32, 8388609f32, -1.23f32);
10631 let c = f32x4::new(2.34f32, 2.34f32, 2097152f32, 2.34f32);
10632 let e = f32x4::new(-1.23f32, 2.34f32, 2097152.25f32, -2.34f32);
10633 let r: f32x4 = transmute(vbslq_f32(transmute(a), transmute(b), transmute(c)));
10634 assert_eq!(r, e);
10635 }
10636 #[simd_test(enable = "neon")]
10637 unsafe fn test_vbslq_p8() {
10638 let a = u8x16::new(
10639 u8::MAX,
10640 1,
10641 u8::MAX,
10642 2,
10643 u8::MAX,
10644 0,
10645 u8::MAX,
10646 0,
10647 u8::MAX,
10648 0,
10649 u8::MAX,
10650 0,
10651 u8::MAX,
10652 0,
10653 u8::MAX,
10654 0,
10655 );
10656 let b = u8x16::new(
10657 u8::MAX,
10658 u8::MAX,
10659 u8::MAX,
10660 u8::MAX,
10661 u8::MAX,
10662 u8::MAX,
10663 u8::MAX,
10664 u8::MAX,
10665 u8::MAX,
10666 u8::MAX,
10667 u8::MAX,
10668 u8::MAX,
10669 u8::MAX,
10670 u8::MAX,
10671 u8::MAX,
10672 u8::MAX,
10673 );
10674 let c = u8x16::new(
10675 u8::MIN,
10676 u8::MIN,
10677 u8::MIN,
10678 u8::MIN,
10679 u8::MIN,
10680 u8::MIN,
10681 u8::MIN,
10682 u8::MIN,
10683 u8::MIN,
10684 u8::MIN,
10685 u8::MIN,
10686 u8::MIN,
10687 u8::MIN,
10688 u8::MIN,
10689 u8::MIN,
10690 u8::MIN,
10691 );
10692 let e = u8x16::new(
10693 u8::MAX,
10694 1,
10695 u8::MAX,
10696 2,
10697 u8::MAX,
10698 u8::MIN,
10699 u8::MAX,
10700 u8::MIN,
10701 u8::MAX,
10702 u8::MIN,
10703 u8::MAX,
10704 u8::MIN,
10705 u8::MAX,
10706 u8::MIN,
10707 u8::MAX,
10708 u8::MIN,
10709 );
10710 let r: u8x16 = transmute(vbslq_p8(transmute(a), transmute(b), transmute(c)));
10711 assert_eq!(r, e);
10712 }
10713 #[simd_test(enable = "neon")]
10714 unsafe fn test_vbslq_p16() {
10715 let a = u16x8::new(u16::MAX, 1, u16::MAX, 2, u16::MAX, 0, u16::MAX, 0);
10716 let b = u16x8::new(
10717 u16::MAX,
10718 u16::MAX,
10719 u16::MAX,
10720 u16::MAX,
10721 u16::MAX,
10722 u16::MAX,
10723 u16::MAX,
10724 u16::MAX,
10725 );
10726 let c = u16x8::new(
10727 u16::MIN,
10728 u16::MIN,
10729 u16::MIN,
10730 u16::MIN,
10731 u16::MIN,
10732 u16::MIN,
10733 u16::MIN,
10734 u16::MIN,
10735 );
10736 let e = u16x8::new(
10737 u16::MAX,
10738 1,
10739 u16::MAX,
10740 2,
10741 u16::MAX,
10742 u16::MIN,
10743 u16::MAX,
10744 u16::MIN,
10745 );
10746 let r: u16x8 = transmute(vbslq_p16(transmute(a), transmute(b), transmute(c)));
10747 assert_eq!(r, e);
10748 }
10749
10750 #[simd_test(enable = "neon")]
10751 unsafe fn test_vorn_s8() {
10752 let a = i8x8::new(0, -1, -2, -3, -4, -5, -6, -7);
10753 let b = i8x8::new(-2, -2, -2, -2, -2, -2, -2, -2);
10754 let e = i8x8::new(1, -1, -1, -3, -3, -5, -5, -7);
10755 let r: i8x8 = transmute(vorn_s8(transmute(a), transmute(b)));
10756 assert_eq!(r, e);
10757 }
10758
10759 #[simd_test(enable = "neon")]
10760 unsafe fn test_vornq_s8() {
10761 let a = i8x16::new(
10762 0, -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12, -13, -14, -15,
10763 );
10764 let b = i8x16::new(
10765 -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
10766 );
10767 let e = i8x16::new(
10768 1, -1, -1, -3, -3, -5, -5, -7, -7, -9, -9, -11, -11, -13, -13, -15,
10769 );
10770 let r: i8x16 = transmute(vornq_s8(transmute(a), transmute(b)));
10771 assert_eq!(r, e);
10772 }
10773
10774 #[simd_test(enable = "neon")]
10775 unsafe fn test_vorn_s16() {
10776 let a = i16x4::new(0, -1, -2, -3);
10777 let b = i16x4::new(-2, -2, -2, -2);
10778 let e = i16x4::new(1, -1, -1, -3);
10779 let r: i16x4 = transmute(vorn_s16(transmute(a), transmute(b)));
10780 assert_eq!(r, e);
10781 }
10782
10783 #[simd_test(enable = "neon")]
10784 unsafe fn test_vornq_s16() {
10785 let a = i16x8::new(0, -1, -2, -3, -4, -5, -6, -7);
10786 let b = i16x8::new(-2, -2, -2, -2, -2, -2, -2, -2);
10787 let e = i16x8::new(1, -1, -1, -3, -3, -5, -5, -7);
10788 let r: i16x8 = transmute(vornq_s16(transmute(a), transmute(b)));
10789 assert_eq!(r, e);
10790 }
10791
10792 #[simd_test(enable = "neon")]
10793 unsafe fn test_vorn_s32() {
10794 let a = i32x2::new(0, -1);
10795 let b = i32x2::new(-2, -2);
10796 let e = i32x2::new(1, -1);
10797 let r: i32x2 = transmute(vorn_s32(transmute(a), transmute(b)));
10798 assert_eq!(r, e);
10799 }
10800
10801 #[simd_test(enable = "neon")]
10802 unsafe fn test_vornq_s32() {
10803 let a = i32x4::new(0, -1, -2, -3);
10804 let b = i32x4::new(-2, -2, -2, -2);
10805 let e = i32x4::new(1, -1, -1, -3);
10806 let r: i32x4 = transmute(vornq_s32(transmute(a), transmute(b)));
10807 assert_eq!(r, e);
10808 }
10809
10810 #[simd_test(enable = "neon")]
10811 unsafe fn test_vorn_s64() {
10812 let a = i64x1::new(0);
10813 let b = i64x1::new(-2);
10814 let e = i64x1::new(1);
10815 let r: i64x1 = transmute(vorn_s64(transmute(a), transmute(b)));
10816 assert_eq!(r, e);
10817 }
10818
10819 #[simd_test(enable = "neon")]
10820 unsafe fn test_vornq_s64() {
10821 let a = i64x2::new(0, -1);
10822 let b = i64x2::new(-2, -2);
10823 let e = i64x2::new(1, -1);
10824 let r: i64x2 = transmute(vornq_s64(transmute(a), transmute(b)));
10825 assert_eq!(r, e);
10826 }
10827
10828 #[simd_test(enable = "neon")]
10829 unsafe fn test_vorn_u8() {
10830 let a = u8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
10831 let t = u8::MAX - 1;
10832 let b = u8x8::new(t, t, t, t, t, t, t, t);
10833 let e = u8x8::new(1, 1, 3, 3, 5, 5, 7, 7);
10834 let r: u8x8 = transmute(vorn_u8(transmute(a), transmute(b)));
10835 assert_eq!(r, e);
10836 }
10837
10838 #[simd_test(enable = "neon")]
10839 unsafe fn test_vornq_u8() {
10840 let a = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
10841 let t = u8::MAX - 1;
10842 let b = u8x16::new(t, t, t, t, t, t, t, t, t, t, t, t, t, t, t, t);
10843 let e = u8x16::new(1, 1, 3, 3, 5, 5, 7, 7, 9, 9, 11, 11, 13, 13, 15, 15);
10844 let r: u8x16 = transmute(vornq_u8(transmute(a), transmute(b)));
10845 assert_eq!(r, e);
10846 }
10847
10848 #[simd_test(enable = "neon")]
10849 unsafe fn test_vorn_u16() {
10850 let a = u16x4::new(0, 1, 2, 3);
10851 let t = u16::MAX - 1;
10852 let b = u16x4::new(t, t, t, t);
10853 let e = u16x4::new(1, 1, 3, 3);
10854 let r: u16x4 = transmute(vorn_u16(transmute(a), transmute(b)));
10855 assert_eq!(r, e);
10856 }
10857
10858 #[simd_test(enable = "neon")]
10859 unsafe fn test_vornq_u16() {
10860 let a = u16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
10861 let t = u16::MAX - 1;
10862 let b = u16x8::new(t, t, t, t, t, t, t, t);
10863 let e = u16x8::new(1, 1, 3, 3, 5, 5, 7, 7);
10864 let r: u16x8 = transmute(vornq_u16(transmute(a), transmute(b)));
10865 assert_eq!(r, e);
10866 }
10867
10868 #[simd_test(enable = "neon")]
10869 unsafe fn test_vorn_u32() {
10870 let a = u32x2::new(0, 1);
10871 let t = u32::MAX - 1;
10872 let b = u32x2::new(t, t);
10873 let e = u32x2::new(1, 1);
10874 let r: u32x2 = transmute(vorn_u32(transmute(a), transmute(b)));
10875 assert_eq!(r, e);
10876 }
10877
10878 #[simd_test(enable = "neon")]
10879 unsafe fn test_vornq_u32() {
10880 let a = u32x4::new(0, 1, 2, 3);
10881 let t = u32::MAX - 1;
10882 let b = u32x4::new(t, t, t, t);
10883 let e = u32x4::new(1, 1, 3, 3);
10884 let r: u32x4 = transmute(vornq_u32(transmute(a), transmute(b)));
10885 assert_eq!(r, e);
10886 }
10887
10888 #[simd_test(enable = "neon")]
10889 unsafe fn test_vorn_u64() {
10890 let a = u64x1::new(0);
10891 let t = u64::MAX - 1;
10892 let b = u64x1::new(t);
10893 let e = u64x1::new(1);
10894 let r: u64x1 = transmute(vorn_u64(transmute(a), transmute(b)));
10895 assert_eq!(r, e);
10896 }
10897
10898 #[simd_test(enable = "neon")]
10899 unsafe fn test_vornq_u64() {
10900 let a = u64x2::new(0, 1);
10901 let t = u64::MAX - 1;
10902 let b = u64x2::new(t, t);
10903 let e = u64x2::new(1, 1);
10904 let r: u64x2 = transmute(vornq_u64(transmute(a), transmute(b)));
10905 assert_eq!(r, e);
10906 }
10907
10908 #[simd_test(enable = "neon")]
10909 unsafe fn test_vmovn_s16() {
10910 let a = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
10911 let e = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
10912 let r: i8x8 = transmute(vmovn_s16(transmute(a)));
10913 assert_eq!(r, e);
10914 }
10915
10916 #[simd_test(enable = "neon")]
10917 unsafe fn test_vmovn_s32() {
10918 let a = i32x4::new(1, 2, 3, 4);
10919 let e = i16x4::new(1, 2, 3, 4);
10920 let r: i16x4 = transmute(vmovn_s32(transmute(a)));
10921 assert_eq!(r, e);
10922 }
10923
10924 #[simd_test(enable = "neon")]
10925 unsafe fn test_vmovn_s64() {
10926 let a = i64x2::new(1, 2);
10927 let e = i32x2::new(1, 2);
10928 let r: i32x2 = transmute(vmovn_s64(transmute(a)));
10929 assert_eq!(r, e);
10930 }
10931
10932 #[simd_test(enable = "neon")]
10933 unsafe fn test_vmovn_u16() {
10934 let a = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
10935 let e = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
10936 let r: u8x8 = transmute(vmovn_u16(transmute(a)));
10937 assert_eq!(r, e);
10938 }
10939
10940 #[simd_test(enable = "neon")]
10941 unsafe fn test_vmovn_u32() {
10942 let a = u32x4::new(1, 2, 3, 4);
10943 let e = u16x4::new(1, 2, 3, 4);
10944 let r: u16x4 = transmute(vmovn_u32(transmute(a)));
10945 assert_eq!(r, e);
10946 }
10947
10948 #[simd_test(enable = "neon")]
10949 unsafe fn test_vmovn_u64() {
10950 let a = u64x2::new(1, 2);
10951 let e = u32x2::new(1, 2);
10952 let r: u32x2 = transmute(vmovn_u64(transmute(a)));
10953 assert_eq!(r, e);
10954 }
10955
10956 #[simd_test(enable = "neon")]
10957 unsafe fn test_vmovl_s8() {
10958 let e = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
10959 let a = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
10960 let r: i16x8 = transmute(vmovl_s8(transmute(a)));
10961 assert_eq!(r, e);
10962 }
10963
10964 #[simd_test(enable = "neon")]
10965 unsafe fn test_vmovl_s16() {
10966 let e = i32x4::new(1, 2, 3, 4);
10967 let a = i16x4::new(1, 2, 3, 4);
10968 let r: i32x4 = transmute(vmovl_s16(transmute(a)));
10969 assert_eq!(r, e);
10970 }
10971
10972 #[simd_test(enable = "neon")]
10973 unsafe fn test_vmovl_s32() {
10974 let e = i64x2::new(1, 2);
10975 let a = i32x2::new(1, 2);
10976 let r: i64x2 = transmute(vmovl_s32(transmute(a)));
10977 assert_eq!(r, e);
10978 }
10979
10980 #[simd_test(enable = "neon")]
10981 unsafe fn test_vmovl_u8() {
10982 let e = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
10983 let a = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
10984 let r: u16x8 = transmute(vmovl_u8(transmute(a)));
10985 assert_eq!(r, e);
10986 }
10987
10988 #[simd_test(enable = "neon")]
10989 unsafe fn test_vmovl_u16() {
10990 let e = u32x4::new(1, 2, 3, 4);
10991 let a = u16x4::new(1, 2, 3, 4);
10992 let r: u32x4 = transmute(vmovl_u16(transmute(a)));
10993 assert_eq!(r, e);
10994 }
10995
10996 #[simd_test(enable = "neon")]
10997 unsafe fn test_vmovl_u32() {
10998 let e = u64x2::new(1, 2);
10999 let a = u32x2::new(1, 2);
11000 let r: u64x2 = transmute(vmovl_u32(transmute(a)));
11001 assert_eq!(r, e);
11002 }
11003
11004 #[simd_test(enable = "neon")]
11005 unsafe fn test_vand_s8() {
11006 test_bit_s8(|i, j| vand_s8(i, j), |a: i8, b: i8| -> i8 { a & b });
11007 }
11008 #[simd_test(enable = "neon")]
11009 unsafe fn test_vandq_s8() {
11010 testq_bit_s8(|i, j| vandq_s8(i, j), |a: i8, b: i8| -> i8 { a & b });
11011 }
11012 #[simd_test(enable = "neon")]
11013 unsafe fn test_vand_s16() {
11014 test_bit_s16(|i, j| vand_s16(i, j), |a: i16, b: i16| -> i16 { a & b });
11015 }
11016 #[simd_test(enable = "neon")]
11017 unsafe fn test_vandq_s16() {
11018 testq_bit_s16(|i, j| vandq_s16(i, j), |a: i16, b: i16| -> i16 { a & b });
11019 }
11020 #[simd_test(enable = "neon")]
11021 unsafe fn test_vand_s32() {
11022 test_bit_s32(|i, j| vand_s32(i, j), |a: i32, b: i32| -> i32 { a & b });
11023 }
11024 #[simd_test(enable = "neon")]
11025 unsafe fn test_vandq_s32() {
11026 testq_bit_s32(|i, j| vandq_s32(i, j), |a: i32, b: i32| -> i32 { a & b });
11027 }
11028 #[simd_test(enable = "neon")]
11029 unsafe fn test_vand_s64() {
11030 test_bit_s64(|i, j| vand_s64(i, j), |a: i64, b: i64| -> i64 { a & b });
11031 }
11032 #[simd_test(enable = "neon")]
11033 unsafe fn test_vandq_s64() {
11034 testq_bit_s64(|i, j| vandq_s64(i, j), |a: i64, b: i64| -> i64 { a & b });
11035 }
11036
11037 #[simd_test(enable = "neon")]
11038 unsafe fn test_vand_u8() {
11039 test_bit_u8(|i, j| vand_u8(i, j), |a: u8, b: u8| -> u8 { a & b });
11040 }
11041 #[simd_test(enable = "neon")]
11042 unsafe fn test_vandq_u8() {
11043 testq_bit_u8(|i, j| vandq_u8(i, j), |a: u8, b: u8| -> u8 { a & b });
11044 }
11045 #[simd_test(enable = "neon")]
11046 unsafe fn test_vand_u16() {
11047 test_bit_u16(|i, j| vand_u16(i, j), |a: u16, b: u16| -> u16 { a & b });
11048 }
11049 #[simd_test(enable = "neon")]
11050 unsafe fn test_vandq_u16() {
11051 testq_bit_u16(|i, j| vandq_u16(i, j), |a: u16, b: u16| -> u16 { a & b });
11052 }
11053 #[simd_test(enable = "neon")]
11054 unsafe fn test_vand_u32() {
11055 test_bit_u32(|i, j| vand_u32(i, j), |a: u32, b: u32| -> u32 { a & b });
11056 }
11057 #[simd_test(enable = "neon")]
11058 unsafe fn test_vandq_u32() {
11059 testq_bit_u32(|i, j| vandq_u32(i, j), |a: u32, b: u32| -> u32 { a & b });
11060 }
11061 #[simd_test(enable = "neon")]
11062 unsafe fn test_vand_u64() {
11063 test_bit_u64(|i, j| vand_u64(i, j), |a: u64, b: u64| -> u64 { a & b });
11064 }
11065 #[simd_test(enable = "neon")]
11066 unsafe fn test_vandq_u64() {
11067 testq_bit_u64(|i, j| vandq_u64(i, j), |a: u64, b: u64| -> u64 { a & b });
11068 }
11069
11070 #[simd_test(enable = "neon")]
11071 unsafe fn test_vorr_s8() {
11072 test_bit_s8(|i, j| vorr_s8(i, j), |a: i8, b: i8| -> i8 { a | b });
11073 }
11074 #[simd_test(enable = "neon")]
11075 unsafe fn test_vorrq_s8() {
11076 testq_bit_s8(|i, j| vorrq_s8(i, j), |a: i8, b: i8| -> i8 { a | b });
11077 }
11078 #[simd_test(enable = "neon")]
11079 unsafe fn test_vorr_s16() {
11080 test_bit_s16(|i, j| vorr_s16(i, j), |a: i16, b: i16| -> i16 { a | b });
11081 }
11082 #[simd_test(enable = "neon")]
11083 unsafe fn test_vorrq_s16() {
11084 testq_bit_s16(|i, j| vorrq_s16(i, j), |a: i16, b: i16| -> i16 { a | b });
11085 }
11086 #[simd_test(enable = "neon")]
11087 unsafe fn test_vorr_s32() {
11088 test_bit_s32(|i, j| vorr_s32(i, j), |a: i32, b: i32| -> i32 { a | b });
11089 }
11090 #[simd_test(enable = "neon")]
11091 unsafe fn test_vorrq_s32() {
11092 testq_bit_s32(|i, j| vorrq_s32(i, j), |a: i32, b: i32| -> i32 { a | b });
11093 }
11094 #[simd_test(enable = "neon")]
11095 unsafe fn test_vorr_s64() {
11096 test_bit_s64(|i, j| vorr_s64(i, j), |a: i64, b: i64| -> i64 { a | b });
11097 }
11098 #[simd_test(enable = "neon")]
11099 unsafe fn test_vorrq_s64() {
11100 testq_bit_s64(|i, j| vorrq_s64(i, j), |a: i64, b: i64| -> i64 { a | b });
11101 }
11102
11103 #[simd_test(enable = "neon")]
11104 unsafe fn test_vorr_u8() {
11105 test_bit_u8(|i, j| vorr_u8(i, j), |a: u8, b: u8| -> u8 { a | b });
11106 }
11107 #[simd_test(enable = "neon")]
11108 unsafe fn test_vorrq_u8() {
11109 testq_bit_u8(|i, j| vorrq_u8(i, j), |a: u8, b: u8| -> u8 { a | b });
11110 }
11111 #[simd_test(enable = "neon")]
11112 unsafe fn test_vorr_u16() {
11113 test_bit_u16(|i, j| vorr_u16(i, j), |a: u16, b: u16| -> u16 { a | b });
11114 }
11115 #[simd_test(enable = "neon")]
11116 unsafe fn test_vorrq_u16() {
11117 testq_bit_u16(|i, j| vorrq_u16(i, j), |a: u16, b: u16| -> u16 { a | b });
11118 }
11119 #[simd_test(enable = "neon")]
11120 unsafe fn test_vorr_u32() {
11121 test_bit_u32(|i, j| vorr_u32(i, j), |a: u32, b: u32| -> u32 { a | b });
11122 }
11123 #[simd_test(enable = "neon")]
11124 unsafe fn test_vorrq_u32() {
11125 testq_bit_u32(|i, j| vorrq_u32(i, j), |a: u32, b: u32| -> u32 { a | b });
11126 }
11127 #[simd_test(enable = "neon")]
11128 unsafe fn test_vorr_u64() {
11129 test_bit_u64(|i, j| vorr_u64(i, j), |a: u64, b: u64| -> u64 { a | b });
11130 }
11131 #[simd_test(enable = "neon")]
11132 unsafe fn test_vorrq_u64() {
11133 testq_bit_u64(|i, j| vorrq_u64(i, j), |a: u64, b: u64| -> u64 { a | b });
11134 }
11135
11136 #[simd_test(enable = "neon")]
11137 unsafe fn test_veor_s8() {
11138 test_bit_s8(|i, j| veor_s8(i, j), |a: i8, b: i8| -> i8 { a ^ b });
11139 }
11140 #[simd_test(enable = "neon")]
11141 unsafe fn test_veorq_s8() {
11142 testq_bit_s8(|i, j| veorq_s8(i, j), |a: i8, b: i8| -> i8 { a ^ b });
11143 }
11144 #[simd_test(enable = "neon")]
11145 unsafe fn test_veor_s16() {
11146 test_bit_s16(|i, j| veor_s16(i, j), |a: i16, b: i16| -> i16 { a ^ b });
11147 }
11148 #[simd_test(enable = "neon")]
11149 unsafe fn test_veorq_s16() {
11150 testq_bit_s16(|i, j| veorq_s16(i, j), |a: i16, b: i16| -> i16 { a ^ b });
11151 }
11152 #[simd_test(enable = "neon")]
11153 unsafe fn test_veor_s32() {
11154 test_bit_s32(|i, j| veor_s32(i, j), |a: i32, b: i32| -> i32 { a ^ b });
11155 }
11156 #[simd_test(enable = "neon")]
11157 unsafe fn test_veorq_s32() {
11158 testq_bit_s32(|i, j| veorq_s32(i, j), |a: i32, b: i32| -> i32 { a ^ b });
11159 }
11160 #[simd_test(enable = "neon")]
11161 unsafe fn test_veor_s64() {
11162 test_bit_s64(|i, j| veor_s64(i, j), |a: i64, b: i64| -> i64 { a ^ b });
11163 }
11164 #[simd_test(enable = "neon")]
11165 unsafe fn test_veorq_s64() {
11166 testq_bit_s64(|i, j| veorq_s64(i, j), |a: i64, b: i64| -> i64 { a ^ b });
11167 }
11168
11169 #[simd_test(enable = "neon")]
11170 unsafe fn test_veor_u8() {
11171 test_bit_u8(|i, j| veor_u8(i, j), |a: u8, b: u8| -> u8 { a ^ b });
11172 }
11173 #[simd_test(enable = "neon")]
11174 unsafe fn test_veorq_u8() {
11175 testq_bit_u8(|i, j| veorq_u8(i, j), |a: u8, b: u8| -> u8 { a ^ b });
11176 }
11177 #[simd_test(enable = "neon")]
11178 unsafe fn test_veor_u16() {
11179 test_bit_u16(|i, j| veor_u16(i, j), |a: u16, b: u16| -> u16 { a ^ b });
11180 }
11181 #[simd_test(enable = "neon")]
11182 unsafe fn test_veorq_u16() {
11183 testq_bit_u16(|i, j| veorq_u16(i, j), |a: u16, b: u16| -> u16 { a ^ b });
11184 }
11185 #[simd_test(enable = "neon")]
11186 unsafe fn test_veor_u32() {
11187 test_bit_u32(|i, j| veor_u32(i, j), |a: u32, b: u32| -> u32 { a ^ b });
11188 }
11189 #[simd_test(enable = "neon")]
11190 unsafe fn test_veorq_u32() {
11191 testq_bit_u32(|i, j| veorq_u32(i, j), |a: u32, b: u32| -> u32 { a ^ b });
11192 }
11193 #[simd_test(enable = "neon")]
11194 unsafe fn test_veor_u64() {
11195 test_bit_u64(|i, j| veor_u64(i, j), |a: u64, b: u64| -> u64 { a ^ b });
11196 }
11197 #[simd_test(enable = "neon")]
11198 unsafe fn test_veorq_u64() {
11199 testq_bit_u64(|i, j| veorq_u64(i, j), |a: u64, b: u64| -> u64 { a ^ b });
11200 }
11201
11202 #[simd_test(enable = "neon")]
11203 unsafe fn test_vceq_s8() {
11204 test_cmp_s8(
11205 |i, j| vceq_s8(i, j),
11206 |a: i8, b: i8| -> u8 { if a == b { 0xFF } else { 0 } },
11207 );
11208 }
11209 #[simd_test(enable = "neon")]
11210 unsafe fn test_vceqq_s8() {
11211 testq_cmp_s8(
11212 |i, j| vceqq_s8(i, j),
11213 |a: i8, b: i8| -> u8 { if a == b { 0xFF } else { 0 } },
11214 );
11215 }
11216 #[simd_test(enable = "neon")]
11217 unsafe fn test_vceq_s16() {
11218 test_cmp_s16(
11219 |i, j| vceq_s16(i, j),
11220 |a: i16, b: i16| -> u16 { if a == b { 0xFFFF } else { 0 } },
11221 );
11222 }
11223 #[simd_test(enable = "neon")]
11224 unsafe fn test_vceqq_s16() {
11225 testq_cmp_s16(
11226 |i, j| vceqq_s16(i, j),
11227 |a: i16, b: i16| -> u16 { if a == b { 0xFFFF } else { 0 } },
11228 );
11229 }
11230 #[simd_test(enable = "neon")]
11231 unsafe fn test_vceq_s32() {
11232 test_cmp_s32(
11233 |i, j| vceq_s32(i, j),
11234 |a: i32, b: i32| -> u32 { if a == b { 0xFFFFFFFF } else { 0 } },
11235 );
11236 }
11237 #[simd_test(enable = "neon")]
11238 unsafe fn test_vceqq_s32() {
11239 testq_cmp_s32(
11240 |i, j| vceqq_s32(i, j),
11241 |a: i32, b: i32| -> u32 { if a == b { 0xFFFFFFFF } else { 0 } },
11242 );
11243 }
11244
11245 #[simd_test(enable = "neon")]
11246 unsafe fn test_vceq_u8() {
11247 test_cmp_u8(
11248 |i, j| vceq_u8(i, j),
11249 |a: u8, b: u8| -> u8 { if a == b { 0xFF } else { 0 } },
11250 );
11251 }
11252 #[simd_test(enable = "neon")]
11253 unsafe fn test_vceqq_u8() {
11254 testq_cmp_u8(
11255 |i, j| vceqq_u8(i, j),
11256 |a: u8, b: u8| -> u8 { if a == b { 0xFF } else { 0 } },
11257 );
11258 }
11259 #[simd_test(enable = "neon")]
11260 unsafe fn test_vceq_u16() {
11261 test_cmp_u16(
11262 |i, j| vceq_u16(i, j),
11263 |a: u16, b: u16| -> u16 { if a == b { 0xFFFF } else { 0 } },
11264 );
11265 }
11266 #[simd_test(enable = "neon")]
11267 unsafe fn test_vceqq_u16() {
11268 testq_cmp_u16(
11269 |i, j| vceqq_u16(i, j),
11270 |a: u16, b: u16| -> u16 { if a == b { 0xFFFF } else { 0 } },
11271 );
11272 }
11273 #[simd_test(enable = "neon")]
11274 unsafe fn test_vceq_u32() {
11275 test_cmp_u32(
11276 |i, j| vceq_u32(i, j),
11277 |a: u32, b: u32| -> u32 { if a == b { 0xFFFFFFFF } else { 0 } },
11278 );
11279 }
11280 #[simd_test(enable = "neon")]
11281 unsafe fn test_vceqq_u32() {
11282 testq_cmp_u32(
11283 |i, j| vceqq_u32(i, j),
11284 |a: u32, b: u32| -> u32 { if a == b { 0xFFFFFFFF } else { 0 } },
11285 );
11286 }
11287
11288 #[simd_test(enable = "neon")]
11289 unsafe fn test_vceq_f32() {
11290 test_cmp_f32(
11291 |i, j| vcge_f32(i, j),
11292 |a: f32, b: f32| -> u32 { if a == b { 0xFFFFFFFF } else { 0 } },
11293 );
11294 }
11295 #[simd_test(enable = "neon")]
11296 unsafe fn test_vceqq_f32() {
11297 testq_cmp_f32(
11298 |i, j| vcgeq_f32(i, j),
11299 |a: f32, b: f32| -> u32 { if a == b { 0xFFFFFFFF } else { 0 } },
11300 );
11301 }
11302
11303 #[simd_test(enable = "neon")]
11304 unsafe fn test_vcgt_s8() {
11305 test_cmp_s8(
11306 |i, j| vcgt_s8(i, j),
11307 |a: i8, b: i8| -> u8 { if a > b { 0xFF } else { 0 } },
11308 );
11309 }
11310 #[simd_test(enable = "neon")]
11311 unsafe fn test_vcgtq_s8() {
11312 testq_cmp_s8(
11313 |i, j| vcgtq_s8(i, j),
11314 |a: i8, b: i8| -> u8 { if a > b { 0xFF } else { 0 } },
11315 );
11316 }
11317 #[simd_test(enable = "neon")]
11318 unsafe fn test_vcgt_s16() {
11319 test_cmp_s16(
11320 |i, j| vcgt_s16(i, j),
11321 |a: i16, b: i16| -> u16 { if a > b { 0xFFFF } else { 0 } },
11322 );
11323 }
11324 #[simd_test(enable = "neon")]
11325 unsafe fn test_vcgtq_s16() {
11326 testq_cmp_s16(
11327 |i, j| vcgtq_s16(i, j),
11328 |a: i16, b: i16| -> u16 { if a > b { 0xFFFF } else { 0 } },
11329 );
11330 }
11331 #[simd_test(enable = "neon")]
11332 unsafe fn test_vcgt_s32() {
11333 test_cmp_s32(
11334 |i, j| vcgt_s32(i, j),
11335 |a: i32, b: i32| -> u32 { if a > b { 0xFFFFFFFF } else { 0 } },
11336 );
11337 }
11338 #[simd_test(enable = "neon")]
11339 unsafe fn test_vcgtq_s32() {
11340 testq_cmp_s32(
11341 |i, j| vcgtq_s32(i, j),
11342 |a: i32, b: i32| -> u32 { if a > b { 0xFFFFFFFF } else { 0 } },
11343 );
11344 }
11345
11346 #[simd_test(enable = "neon")]
11347 unsafe fn test_vcgt_u8() {
11348 test_cmp_u8(
11349 |i, j| vcgt_u8(i, j),
11350 |a: u8, b: u8| -> u8 { if a > b { 0xFF } else { 0 } },
11351 );
11352 }
11353 #[simd_test(enable = "neon")]
11354 unsafe fn test_vcgtq_u8() {
11355 testq_cmp_u8(
11356 |i, j| vcgtq_u8(i, j),
11357 |a: u8, b: u8| -> u8 { if a > b { 0xFF } else { 0 } },
11358 );
11359 }
11360 #[simd_test(enable = "neon")]
11361 unsafe fn test_vcgt_u16() {
11362 test_cmp_u16(
11363 |i, j| vcgt_u16(i, j),
11364 |a: u16, b: u16| -> u16 { if a > b { 0xFFFF } else { 0 } },
11365 );
11366 }
11367 #[simd_test(enable = "neon")]
11368 unsafe fn test_vcgtq_u16() {
11369 testq_cmp_u16(
11370 |i, j| vcgtq_u16(i, j),
11371 |a: u16, b: u16| -> u16 { if a > b { 0xFFFF } else { 0 } },
11372 );
11373 }
11374 #[simd_test(enable = "neon")]
11375 unsafe fn test_vcgt_u32() {
11376 test_cmp_u32(
11377 |i, j| vcgt_u32(i, j),
11378 |a: u32, b: u32| -> u32 { if a > b { 0xFFFFFF } else { 0 } },
11379 );
11380 }
11381 #[simd_test(enable = "neon")]
11382 unsafe fn test_vcgtq_u32() {
11383 testq_cmp_u32(
11384 |i, j| vcgtq_u32(i, j),
11385 |a: u32, b: u32| -> u32 { if a > b { 0xFFFFFFFF } else { 0 } },
11386 );
11387 }
11388
11389 #[simd_test(enable = "neon")]
11390 unsafe fn test_vcgt_f32() {
11391 test_cmp_f32(
11392 |i, j| vcgt_f32(i, j),
11393 |a: f32, b: f32| -> u32 { if a > b { 0xFFFFFFFF } else { 0 } },
11394 );
11395 }
11396 #[simd_test(enable = "neon")]
11397 unsafe fn test_vcgtq_f32() {
11398 testq_cmp_f32(
11399 |i, j| vcgtq_f32(i, j),
11400 |a: f32, b: f32| -> u32 { if a > b { 0xFFFFFFFF } else { 0 } },
11401 );
11402 }
11403
11404 #[simd_test(enable = "neon")]
11405 unsafe fn test_vclt_s8() {
11406 test_cmp_s8(
11407 |i, j| vclt_s8(i, j),
11408 |a: i8, b: i8| -> u8 { if a < b { 0xFF } else { 0 } },
11409 );
11410 }
11411 #[simd_test(enable = "neon")]
11412 unsafe fn test_vcltq_s8() {
11413 testq_cmp_s8(
11414 |i, j| vcltq_s8(i, j),
11415 |a: i8, b: i8| -> u8 { if a < b { 0xFF } else { 0 } },
11416 );
11417 }
11418 #[simd_test(enable = "neon")]
11419 unsafe fn test_vclt_s16() {
11420 test_cmp_s16(
11421 |i, j| vclt_s16(i, j),
11422 |a: i16, b: i16| -> u16 { if a < b { 0xFFFF } else { 0 } },
11423 );
11424 }
11425 #[simd_test(enable = "neon")]
11426 unsafe fn test_vcltq_s16() {
11427 testq_cmp_s16(
11428 |i, j| vcltq_s16(i, j),
11429 |a: i16, b: i16| -> u16 { if a < b { 0xFFFF } else { 0 } },
11430 );
11431 }
11432 #[simd_test(enable = "neon")]
11433 unsafe fn test_vclt_s32() {
11434 test_cmp_s32(
11435 |i, j| vclt_s32(i, j),
11436 |a: i32, b: i32| -> u32 { if a < b { 0xFFFFFFFF } else { 0 } },
11437 );
11438 }
11439 #[simd_test(enable = "neon")]
11440 unsafe fn test_vcltq_s32() {
11441 testq_cmp_s32(
11442 |i, j| vcltq_s32(i, j),
11443 |a: i32, b: i32| -> u32 { if a < b { 0xFFFFFFFF } else { 0 } },
11444 );
11445 }
11446
11447 #[simd_test(enable = "neon")]
11448 unsafe fn test_vclt_u8() {
11449 test_cmp_u8(
11450 |i, j| vclt_u8(i, j),
11451 |a: u8, b: u8| -> u8 { if a < b { 0xFF } else { 0 } },
11452 );
11453 }
11454 #[simd_test(enable = "neon")]
11455 unsafe fn test_vcltq_u8() {
11456 testq_cmp_u8(
11457 |i, j| vcltq_u8(i, j),
11458 |a: u8, b: u8| -> u8 { if a < b { 0xFF } else { 0 } },
11459 );
11460 }
11461 #[simd_test(enable = "neon")]
11462 unsafe fn test_vclt_u16() {
11463 test_cmp_u16(
11464 |i, j| vclt_u16(i, j),
11465 |a: u16, b: u16| -> u16 { if a < b { 0xFFFF } else { 0 } },
11466 );
11467 }
11468 #[simd_test(enable = "neon")]
11469 unsafe fn test_vcltq_u16() {
11470 testq_cmp_u16(
11471 |i, j| vcltq_u16(i, j),
11472 |a: u16, b: u16| -> u16 { if a < b { 0xFFFF } else { 0 } },
11473 );
11474 }
11475 #[simd_test(enable = "neon")]
11476 unsafe fn test_vclt_u32() {
11477 test_cmp_u32(
11478 |i, j| vclt_u32(i, j),
11479 |a: u32, b: u32| -> u32 { if a < b { 0xFFFFFF } else { 0 } },
11480 );
11481 }
11482 #[simd_test(enable = "neon")]
11483 unsafe fn test_vcltq_u32() {
11484 testq_cmp_u32(
11485 |i, j| vcltq_u32(i, j),
11486 |a: u32, b: u32| -> u32 { if a < b { 0xFFFFFFFF } else { 0 } },
11487 );
11488 }
11489
11490 #[simd_test(enable = "neon")]
11491 unsafe fn test_vclt_f32() {
11492 test_cmp_f32(
11493 |i, j| vclt_f32(i, j),
11494 |a: f32, b: f32| -> u32 { if a < b { 0xFFFFFFFF } else { 0 } },
11495 );
11496 }
11497 #[simd_test(enable = "neon")]
11498 unsafe fn test_vcltq_f32() {
11499 testq_cmp_f32(
11500 |i, j| vcltq_f32(i, j),
11501 |a: f32, b: f32| -> u32 { if a < b { 0xFFFFFFFF } else { 0 } },
11502 );
11503 }
11504
11505 #[simd_test(enable = "neon")]
11506 unsafe fn test_vcle_s8() {
11507 test_cmp_s8(
11508 |i, j| vcle_s8(i, j),
11509 |a: i8, b: i8| -> u8 { if a <= b { 0xFF } else { 0 } },
11510 );
11511 }
11512 #[simd_test(enable = "neon")]
11513 unsafe fn test_vcleq_s8() {
11514 testq_cmp_s8(
11515 |i, j| vcleq_s8(i, j),
11516 |a: i8, b: i8| -> u8 { if a <= b { 0xFF } else { 0 } },
11517 );
11518 }
11519 #[simd_test(enable = "neon")]
11520 unsafe fn test_vcle_s16() {
11521 test_cmp_s16(
11522 |i, j| vcle_s16(i, j),
11523 |a: i16, b: i16| -> u16 { if a <= b { 0xFFFF } else { 0 } },
11524 );
11525 }
11526 #[simd_test(enable = "neon")]
11527 unsafe fn test_vcleq_s16() {
11528 testq_cmp_s16(
11529 |i, j| vcleq_s16(i, j),
11530 |a: i16, b: i16| -> u16 { if a <= b { 0xFFFF } else { 0 } },
11531 );
11532 }
11533 #[simd_test(enable = "neon")]
11534 unsafe fn test_vcle_s32() {
11535 test_cmp_s32(
11536 |i, j| vcle_s32(i, j),
11537 |a: i32, b: i32| -> u32 { if a <= b { 0xFFFFFFFF } else { 0 } },
11538 );
11539 }
11540 #[simd_test(enable = "neon")]
11541 unsafe fn test_vcleq_s32() {
11542 testq_cmp_s32(
11543 |i, j| vcleq_s32(i, j),
11544 |a: i32, b: i32| -> u32 { if a <= b { 0xFFFFFFFF } else { 0 } },
11545 );
11546 }
11547
11548 #[simd_test(enable = "neon")]
11549 unsafe fn test_vcle_u8() {
11550 test_cmp_u8(
11551 |i, j| vcle_u8(i, j),
11552 |a: u8, b: u8| -> u8 { if a <= b { 0xFF } else { 0 } },
11553 );
11554 }
11555 #[simd_test(enable = "neon")]
11556 unsafe fn test_vcleq_u8() {
11557 testq_cmp_u8(
11558 |i, j| vcleq_u8(i, j),
11559 |a: u8, b: u8| -> u8 { if a <= b { 0xFF } else { 0 } },
11560 );
11561 }
11562 #[simd_test(enable = "neon")]
11563 unsafe fn test_vcle_u16() {
11564 test_cmp_u16(
11565 |i, j| vcle_u16(i, j),
11566 |a: u16, b: u16| -> u16 { if a <= b { 0xFFFF } else { 0 } },
11567 );
11568 }
11569 #[simd_test(enable = "neon")]
11570 unsafe fn test_vcleq_u16() {
11571 testq_cmp_u16(
11572 |i, j| vcleq_u16(i, j),
11573 |a: u16, b: u16| -> u16 { if a <= b { 0xFFFF } else { 0 } },
11574 );
11575 }
11576 #[simd_test(enable = "neon")]
11577 unsafe fn test_vcle_u32() {
11578 test_cmp_u32(
11579 |i, j| vcle_u32(i, j),
11580 |a: u32, b: u32| -> u32 { if a <= b { 0xFFFFFFFF } else { 0 } },
11581 );
11582 }
11583 #[simd_test(enable = "neon")]
11584 unsafe fn test_vcleq_u32() {
11585 testq_cmp_u32(
11586 |i, j| vcleq_u32(i, j),
11587 |a: u32, b: u32| -> u32 { if a <= b { 0xFFFFFFFF } else { 0 } },
11588 );
11589 }
11590
11591 #[simd_test(enable = "neon")]
11592 unsafe fn test_vcle_f32() {
11593 test_cmp_f32(
11594 |i, j| vcle_f32(i, j),
11595 |a: f32, b: f32| -> u32 { if a <= b { 0xFFFFFFFF } else { 0 } },
11596 );
11597 }
11598 #[simd_test(enable = "neon")]
11599 unsafe fn test_vcleq_f32() {
11600 testq_cmp_f32(
11601 |i, j| vcleq_f32(i, j),
11602 |a: f32, b: f32| -> u32 { if a <= b { 0xFFFFFFFF } else { 0 } },
11603 );
11604 }
11605
11606 #[simd_test(enable = "neon")]
11607 unsafe fn test_vcge_s8() {
11608 test_cmp_s8(
11609 |i, j| vcge_s8(i, j),
11610 |a: i8, b: i8| -> u8 { if a >= b { 0xFF } else { 0 } },
11611 );
11612 }
11613 #[simd_test(enable = "neon")]
11614 unsafe fn test_vcgeq_s8() {
11615 testq_cmp_s8(
11616 |i, j| vcgeq_s8(i, j),
11617 |a: i8, b: i8| -> u8 { if a >= b { 0xFF } else { 0 } },
11618 );
11619 }
11620 #[simd_test(enable = "neon")]
11621 unsafe fn test_vcge_s16() {
11622 test_cmp_s16(
11623 |i, j| vcge_s16(i, j),
11624 |a: i16, b: i16| -> u16 { if a >= b { 0xFFFF } else { 0 } },
11625 );
11626 }
11627 #[simd_test(enable = "neon")]
11628 unsafe fn test_vcgeq_s16() {
11629 testq_cmp_s16(
11630 |i, j| vcgeq_s16(i, j),
11631 |a: i16, b: i16| -> u16 { if a >= b { 0xFFFF } else { 0 } },
11632 );
11633 }
11634 #[simd_test(enable = "neon")]
11635 unsafe fn test_vcge_s32() {
11636 test_cmp_s32(
11637 |i, j| vcge_s32(i, j),
11638 |a: i32, b: i32| -> u32 { if a >= b { 0xFFFFFFFF } else { 0 } },
11639 );
11640 }
11641 #[simd_test(enable = "neon")]
11642 unsafe fn test_vcgeq_s32() {
11643 testq_cmp_s32(
11644 |i, j| vcgeq_s32(i, j),
11645 |a: i32, b: i32| -> u32 { if a >= b { 0xFFFFFFFF } else { 0 } },
11646 );
11647 }
11648
11649 #[simd_test(enable = "neon")]
11650 unsafe fn test_vcge_u8() {
11651 test_cmp_u8(
11652 |i, j| vcge_u8(i, j),
11653 |a: u8, b: u8| -> u8 { if a >= b { 0xFF } else { 0 } },
11654 );
11655 }
11656 #[simd_test(enable = "neon")]
11657 unsafe fn test_vcgeq_u8() {
11658 testq_cmp_u8(
11659 |i, j| vcgeq_u8(i, j),
11660 |a: u8, b: u8| -> u8 { if a >= b { 0xFF } else { 0 } },
11661 );
11662 }
11663 #[simd_test(enable = "neon")]
11664 unsafe fn test_vcge_u16() {
11665 test_cmp_u16(
11666 |i, j| vcge_u16(i, j),
11667 |a: u16, b: u16| -> u16 { if a >= b { 0xFFFF } else { 0 } },
11668 );
11669 }
11670 #[simd_test(enable = "neon")]
11671 unsafe fn test_vcgeq_u16() {
11672 testq_cmp_u16(
11673 |i, j| vcgeq_u16(i, j),
11674 |a: u16, b: u16| -> u16 { if a >= b { 0xFFFF } else { 0 } },
11675 );
11676 }
11677 #[simd_test(enable = "neon")]
11678 unsafe fn test_vcge_u32() {
11679 test_cmp_u32(
11680 |i, j| vcge_u32(i, j),
11681 |a: u32, b: u32| -> u32 { if a >= b { 0xFFFFFFFF } else { 0 } },
11682 );
11683 }
11684 #[simd_test(enable = "neon")]
11685 unsafe fn test_vcgeq_u32() {
11686 testq_cmp_u32(
11687 |i, j| vcgeq_u32(i, j),
11688 |a: u32, b: u32| -> u32 { if a >= b { 0xFFFFFFFF } else { 0 } },
11689 );
11690 }
11691
11692 #[simd_test(enable = "neon")]
11693 unsafe fn test_vcge_f32() {
11694 test_cmp_f32(
11695 |i, j| vcge_f32(i, j),
11696 |a: f32, b: f32| -> u32 { if a >= b { 0xFFFFFFFF } else { 0 } },
11697 );
11698 }
11699 #[simd_test(enable = "neon")]
11700 unsafe fn test_vcgeq_f32() {
11701 testq_cmp_f32(
11702 |i, j| vcgeq_f32(i, j),
11703 |a: f32, b: f32| -> u32 { if a >= b { 0xFFFFFFFF } else { 0 } },
11704 );
11705 }
11706
11707 #[simd_test(enable = "neon")]
11708 unsafe fn test_vqsub_s8() {
11709 test_ari_s8(
11710 |i, j| vqsub_s8(i, j),
11711 |a: i8, b: i8| -> i8 { a.saturating_sub(b) },
11712 );
11713 }
11714 #[simd_test(enable = "neon")]
11715 unsafe fn test_vqsubq_s8() {
11716 testq_ari_s8(
11717 |i, j| vqsubq_s8(i, j),
11718 |a: i8, b: i8| -> i8 { a.saturating_sub(b) },
11719 );
11720 }
11721 #[simd_test(enable = "neon")]
11722 unsafe fn test_vqsub_s16() {
11723 test_ari_s16(
11724 |i, j| vqsub_s16(i, j),
11725 |a: i16, b: i16| -> i16 { a.saturating_sub(b) },
11726 );
11727 }
11728 #[simd_test(enable = "neon")]
11729 unsafe fn test_vqsubq_s16() {
11730 testq_ari_s16(
11731 |i, j| vqsubq_s16(i, j),
11732 |a: i16, b: i16| -> i16 { a.saturating_sub(b) },
11733 );
11734 }
11735 #[simd_test(enable = "neon")]
11736 unsafe fn test_vqsub_s32() {
11737 test_ari_s32(
11738 |i, j| vqsub_s32(i, j),
11739 |a: i32, b: i32| -> i32 { a.saturating_sub(b) },
11740 );
11741 }
11742 #[simd_test(enable = "neon")]
11743 unsafe fn test_vqsubq_s32() {
11744 testq_ari_s32(
11745 |i, j| vqsubq_s32(i, j),
11746 |a: i32, b: i32| -> i32 { a.saturating_sub(b) },
11747 );
11748 }
11749
11750 #[simd_test(enable = "neon")]
11751 unsafe fn test_vqsub_u8() {
11752 test_ari_u8(
11753 |i, j| vqsub_u8(i, j),
11754 |a: u8, b: u8| -> u8 { a.saturating_sub(b) },
11755 );
11756 }
11757 #[simd_test(enable = "neon")]
11758 unsafe fn test_vqsubq_u8() {
11759 testq_ari_u8(
11760 |i, j| vqsubq_u8(i, j),
11761 |a: u8, b: u8| -> u8 { a.saturating_sub(b) },
11762 );
11763 }
11764 #[simd_test(enable = "neon")]
11765 unsafe fn test_vqsub_u16() {
11766 test_ari_u16(
11767 |i, j| vqsub_u16(i, j),
11768 |a: u16, b: u16| -> u16 { a.saturating_sub(b) },
11769 );
11770 }
11771 #[simd_test(enable = "neon")]
11772 unsafe fn test_vqsubq_u16() {
11773 testq_ari_u16(
11774 |i, j| vqsubq_u16(i, j),
11775 |a: u16, b: u16| -> u16 { a.saturating_sub(b) },
11776 );
11777 }
11778 #[simd_test(enable = "neon")]
11779 unsafe fn test_vqsub_u32() {
11780 test_ari_u32(
11781 |i, j| vqsub_u32(i, j),
11782 |a: u32, b: u32| -> u32 { a.saturating_sub(b) },
11783 );
11784 }
11785 #[simd_test(enable = "neon")]
11786 unsafe fn test_vqsubq_u32() {
11787 testq_ari_u32(
11788 |i, j| vqsubq_u32(i, j),
11789 |a: u32, b: u32| -> u32 { a.saturating_sub(b) },
11790 );
11791 }
11792
11793 #[simd_test(enable = "neon")]
11794 unsafe fn test_vhadd_s8() {
11795 test_ari_s8(|i, j| vhadd_s8(i, j), |a: i8, b: i8| -> i8 { a & b });
11796 }
11797 #[simd_test(enable = "neon")]
11798 unsafe fn test_vhaddq_s8() {
11799 testq_ari_s8(|i, j| vhaddq_s8(i, j), |a: i8, b: i8| -> i8 { a & b });
11800 }
11801 #[simd_test(enable = "neon")]
11802 unsafe fn test_vhadd_s16() {
11803 test_ari_s16(|i, j| vhadd_s16(i, j), |a: i16, b: i16| -> i16 { a & b });
11804 }
11805 #[simd_test(enable = "neon")]
11806 unsafe fn test_vhaddq_s16() {
11807 testq_ari_s16(|i, j| vhaddq_s16(i, j), |a: i16, b: i16| -> i16 { a & b });
11808 }
11809 #[simd_test(enable = "neon")]
11810 unsafe fn test_vhadd_s32() {
11811 test_ari_s32(|i, j| vhadd_s32(i, j), |a: i32, b: i32| -> i32 { a & b });
11812 }
11813 #[simd_test(enable = "neon")]
11814 unsafe fn test_vhaddq_s32() {
11815 testq_ari_s32(|i, j| vhaddq_s32(i, j), |a: i32, b: i32| -> i32 { a & b });
11816 }
11817
11818 #[simd_test(enable = "neon")]
11819 unsafe fn test_vhadd_u8() {
11820 test_ari_u8(|i, j| vhadd_u8(i, j), |a: u8, b: u8| -> u8 { a & b });
11821 }
11822 #[simd_test(enable = "neon")]
11823 unsafe fn test_vhaddq_u8() {
11824 testq_ari_u8(|i, j| vhaddq_u8(i, j), |a: u8, b: u8| -> u8 { a & b });
11825 }
11826 #[simd_test(enable = "neon")]
11827 unsafe fn test_vhadd_u16() {
11828 test_ari_u16(|i, j| vhadd_u16(i, j), |a: u16, b: u16| -> u16 { a & b });
11829 }
11830 #[simd_test(enable = "neon")]
11831 unsafe fn test_vhaddq_u16() {
11832 testq_ari_u16(|i, j| vhaddq_u16(i, j), |a: u16, b: u16| -> u16 { a & b });
11833 }
11834 #[simd_test(enable = "neon")]
11835 unsafe fn test_vhadd_u32() {
11836 test_ari_u32(|i, j| vhadd_u32(i, j), |a: u32, b: u32| -> u32 { a & b });
11837 }
11838 #[simd_test(enable = "neon")]
11839 unsafe fn test_vhaddq_u32() {
11840 testq_ari_u32(|i, j| vhaddq_u32(i, j), |a: u32, b: u32| -> u32 { a & b });
11841 }
11842
11843 #[simd_test(enable = "neon")]
11844 unsafe fn test_vrhadd_s8() {
11845 test_ari_s8(|i, j| vrhadd_s8(i, j), |a: i8, b: i8| -> i8 { a & b });
11846 }
11847 #[simd_test(enable = "neon")]
11848 unsafe fn test_vrhaddq_s8() {
11849 testq_ari_s8(|i, j| vrhaddq_s8(i, j), |a: i8, b: i8| -> i8 { a & b });
11850 }
11851 #[simd_test(enable = "neon")]
11852 unsafe fn test_vrhadd_s16() {
11853 test_ari_s16(|i, j| vrhadd_s16(i, j), |a: i16, b: i16| -> i16 { a & b });
11854 }
11855 #[simd_test(enable = "neon")]
11856 unsafe fn test_vrhaddq_s16() {
11857 testq_ari_s16(|i, j| vrhaddq_s16(i, j), |a: i16, b: i16| -> i16 { a & b });
11858 }
11859 #[simd_test(enable = "neon")]
11860 unsafe fn test_vrhadd_s32() {
11861 test_ari_s32(|i, j| vrhadd_s32(i, j), |a: i32, b: i32| -> i32 { a & b });
11862 }
11863 #[simd_test(enable = "neon")]
11864 unsafe fn test_vrhaddq_s32() {
11865 testq_ari_s32(|i, j| vrhaddq_s32(i, j), |a: i32, b: i32| -> i32 { a & b });
11866 }
11867
11868 #[simd_test(enable = "neon")]
11869 unsafe fn test_vrhadd_u8() {
11870 test_ari_u8(|i, j| vrhadd_u8(i, j), |a: u8, b: u8| -> u8 { a & b });
11871 }
11872 #[simd_test(enable = "neon")]
11873 unsafe fn test_vrhaddq_u8() {
11874 testq_ari_u8(|i, j| vrhaddq_u8(i, j), |a: u8, b: u8| -> u8 { a & b });
11875 }
11876 #[simd_test(enable = "neon")]
11877 unsafe fn test_vrhadd_u16() {
11878 test_ari_u16(|i, j| vrhadd_u16(i, j), |a: u16, b: u16| -> u16 { a & b });
11879 }
11880 #[simd_test(enable = "neon")]
11881 unsafe fn test_vrhaddq_u16() {
11882 testq_ari_u16(|i, j| vrhaddq_u16(i, j), |a: u16, b: u16| -> u16 { a & b });
11883 }
11884 #[simd_test(enable = "neon")]
11885 unsafe fn test_vrhadd_u32() {
11886 test_ari_u32(|i, j| vrhadd_u32(i, j), |a: u32, b: u32| -> u32 { a & b });
11887 }
11888 #[simd_test(enable = "neon")]
11889 unsafe fn test_vrhaddq_u32() {
11890 testq_ari_u32(|i, j| vrhaddq_u32(i, j), |a: u32, b: u32| -> u32 { a & b });
11891 }
11892
11893 #[simd_test(enable = "neon")]
11894 unsafe fn test_vqadd_s8() {
11895 test_ari_s8(
11896 |i, j| vqadd_s8(i, j),
11897 |a: i8, b: i8| -> i8 { a.saturating_add(b) },
11898 );
11899 }
11900 #[simd_test(enable = "neon")]
11901 unsafe fn test_vqaddq_s8() {
11902 testq_ari_s8(
11903 |i, j| vqaddq_s8(i, j),
11904 |a: i8, b: i8| -> i8 { a.saturating_add(b) },
11905 );
11906 }
11907 #[simd_test(enable = "neon")]
11908 unsafe fn test_vqadd_s16() {
11909 test_ari_s16(
11910 |i, j| vqadd_s16(i, j),
11911 |a: i16, b: i16| -> i16 { a.saturating_add(b) },
11912 );
11913 }
11914 #[simd_test(enable = "neon")]
11915 unsafe fn test_vqaddq_s16() {
11916 testq_ari_s16(
11917 |i, j| vqaddq_s16(i, j),
11918 |a: i16, b: i16| -> i16 { a.saturating_add(b) },
11919 );
11920 }
11921 #[simd_test(enable = "neon")]
11922 unsafe fn test_vqadd_s32() {
11923 test_ari_s32(
11924 |i, j| vqadd_s32(i, j),
11925 |a: i32, b: i32| -> i32 { a.saturating_add(b) },
11926 );
11927 }
11928 #[simd_test(enable = "neon")]
11929 unsafe fn test_vqaddq_s32() {
11930 testq_ari_s32(
11931 |i, j| vqaddq_s32(i, j),
11932 |a: i32, b: i32| -> i32 { a.saturating_add(b) },
11933 );
11934 }
11935
11936 #[simd_test(enable = "neon")]
11937 unsafe fn test_vqadd_u8() {
11938 test_ari_u8(
11939 |i, j| vqadd_u8(i, j),
11940 |a: u8, b: u8| -> u8 { a.saturating_add(b) },
11941 );
11942 }
11943 #[simd_test(enable = "neon")]
11944 unsafe fn test_vqaddq_u8() {
11945 testq_ari_u8(
11946 |i, j| vqaddq_u8(i, j),
11947 |a: u8, b: u8| -> u8 { a.saturating_add(b) },
11948 );
11949 }
11950 #[simd_test(enable = "neon")]
11951 unsafe fn test_vqadd_u16() {
11952 test_ari_u16(
11953 |i, j| vqadd_u16(i, j),
11954 |a: u16, b: u16| -> u16 { a.saturating_add(b) },
11955 );
11956 }
11957 #[simd_test(enable = "neon")]
11958 unsafe fn test_vqaddq_u16() {
11959 testq_ari_u16(
11960 |i, j| vqaddq_u16(i, j),
11961 |a: u16, b: u16| -> u16 { a.saturating_add(b) },
11962 );
11963 }
11964 #[simd_test(enable = "neon")]
11965 unsafe fn test_vqadd_u32() {
11966 test_ari_u32(
11967 |i, j| vqadd_u32(i, j),
11968 |a: u32, b: u32| -> u32 { a.saturating_add(b) },
11969 );
11970 }
11971 #[simd_test(enable = "neon")]
11972 unsafe fn test_vqaddq_u32() {
11973 testq_ari_u32(
11974 |i, j| vqaddq_u32(i, j),
11975 |a: u32, b: u32| -> u32 { a.saturating_add(b) },
11976 );
11977 }
11978
11979 #[simd_test(enable = "neon")]
11980 unsafe fn test_vmul_s8() {
11981 test_ari_s8(
11982 |i, j| vmul_s8(i, j),
11983 |a: i8, b: i8| -> i8 { a.overflowing_mul(b).0 },
11984 );
11985 }
11986 #[simd_test(enable = "neon")]
11987 unsafe fn test_vmulq_s8() {
11988 testq_ari_s8(
11989 |i, j| vmulq_s8(i, j),
11990 |a: i8, b: i8| -> i8 { a.overflowing_mul(b).0 },
11991 );
11992 }
11993 #[simd_test(enable = "neon")]
11994 unsafe fn test_vmul_s16() {
11995 test_ari_s16(
11996 |i, j| vmul_s16(i, j),
11997 |a: i16, b: i16| -> i16 { a.overflowing_mul(b).0 },
11998 );
11999 }
12000 #[simd_test(enable = "neon")]
12001 unsafe fn test_vmulq_s16() {
12002 testq_ari_s16(
12003 |i, j| vmulq_s16(i, j),
12004 |a: i16, b: i16| -> i16 { a.overflowing_mul(b).0 },
12005 );
12006 }
12007 #[simd_test(enable = "neon")]
12008 unsafe fn test_vmul_s32() {
12009 test_ari_s32(
12010 |i, j| vmul_s32(i, j),
12011 |a: i32, b: i32| -> i32 { a.overflowing_mul(b).0 },
12012 );
12013 }
12014 #[simd_test(enable = "neon")]
12015 unsafe fn test_vmulq_s32() {
12016 testq_ari_s32(
12017 |i, j| vmulq_s32(i, j),
12018 |a: i32, b: i32| -> i32 { a.overflowing_mul(b).0 },
12019 );
12020 }
12021
12022 #[simd_test(enable = "neon")]
12023 unsafe fn test_vmul_u8() {
12024 test_ari_u8(
12025 |i, j| vmul_u8(i, j),
12026 |a: u8, b: u8| -> u8 { a.overflowing_mul(b).0 },
12027 );
12028 }
12029 #[simd_test(enable = "neon")]
12030 unsafe fn test_vmulq_u8() {
12031 testq_ari_u8(
12032 |i, j| vmulq_u8(i, j),
12033 |a: u8, b: u8| -> u8 { a.overflowing_mul(b).0 },
12034 );
12035 }
12036 #[simd_test(enable = "neon")]
12037 unsafe fn test_vmul_u16() {
12038 test_ari_u16(
12039 |i, j| vmul_u16(i, j),
12040 |a: u16, b: u16| -> u16 { a.overflowing_mul(b).0 },
12041 );
12042 }
12043 #[simd_test(enable = "neon")]
12044 unsafe fn test_vmulq_u16() {
12045 testq_ari_u16(
12046 |i, j| vmulq_u16(i, j),
12047 |a: u16, b: u16| -> u16 { a.overflowing_mul(b).0 },
12048 );
12049 }
12050 #[simd_test(enable = "neon")]
12051 unsafe fn test_vmul_u32() {
12052 test_ari_u32(
12053 |i, j| vmul_u32(i, j),
12054 |a: u32, b: u32| -> u32 { a.overflowing_mul(b).0 },
12055 );
12056 }
12057 #[simd_test(enable = "neon")]
12058 unsafe fn test_vmulq_u32() {
12059 testq_ari_u32(
12060 |i, j| vmulq_u32(i, j),
12061 |a: u32, b: u32| -> u32 { a.overflowing_mul(b).0 },
12062 );
12063 }
12064
12065 #[simd_test(enable = "neon")]
12066 unsafe fn test_vmul_f32() {
12067 test_ari_f32(|i, j| vmul_f32(i, j), |a: f32, b: f32| -> f32 { a * b });
12068 }
12069 #[simd_test(enable = "neon")]
12070 unsafe fn test_vmulq_f32() {
12071 testq_ari_f32(|i, j| vmulq_f32(i, j), |a: f32, b: f32| -> f32 { a * b });
12072 }
12073
12074 #[simd_test(enable = "neon")]
12075 unsafe fn test_vsub_s8() {
12076 test_ari_s8(|i, j| vsub_s8(i, j), |a: i8, b: i8| -> i8 { a - b });
12077 }
12078 #[simd_test(enable = "neon")]
12079 unsafe fn test_vsubq_s8() {
12080 testq_ari_s8(|i, j| vsubq_s8(i, j), |a: i8, b: i8| -> i8 { a - b });
12081 }
12082 #[simd_test(enable = "neon")]
12083 unsafe fn test_vsub_s16() {
12084 test_ari_s16(|i, j| vsub_s16(i, j), |a: i16, b: i16| -> i16 { a - b });
12085 }
12086 #[simd_test(enable = "neon")]
12087 unsafe fn test_vsubq_s16() {
12088 testq_ari_s16(|i, j| vsubq_s16(i, j), |a: i16, b: i16| -> i16 { a - b });
12089 }
12090 #[simd_test(enable = "neon")]
12091 unsafe fn test_vsub_s32() {
12092 test_ari_s32(|i, j| vsub_s32(i, j), |a: i32, b: i32| -> i32 { a - b });
12093 }
12094 #[simd_test(enable = "neon")]
12095 unsafe fn test_vsubq_s32() {
12096 testq_ari_s32(|i, j| vsubq_s32(i, j), |a: i32, b: i32| -> i32 { a - b });
12097 }
12098
12099 #[simd_test(enable = "neon")]
12100 unsafe fn test_vsub_u8() {
12101 test_ari_u8(|i, j| vsub_u8(i, j), |a: u8, b: u8| -> u8 { a - b });
12102 }
12103 #[simd_test(enable = "neon")]
12104 unsafe fn test_vsubq_u8() {
12105 testq_ari_u8(|i, j| vsubq_u8(i, j), |a: u8, b: u8| -> u8 { a - b });
12106 }
12107 #[simd_test(enable = "neon")]
12108 unsafe fn test_vsub_u16() {
12109 test_ari_u16(|i, j| vsub_u16(i, j), |a: u16, b: u16| -> u16 { a - b });
12110 }
12111 #[simd_test(enable = "neon")]
12112 unsafe fn test_vsubq_u16() {
12113 testq_ari_u16(|i, j| vsubq_u16(i, j), |a: u16, b: u16| -> u16 { a - b });
12114 }
12115 #[simd_test(enable = "neon")]
12116 unsafe fn test_vsub_u32() {
12117 test_ari_u32(|i, j| vsub_u32(i, j), |a: u32, b: u32| -> u32 { a - b });
12118 }
12119 #[simd_test(enable = "neon")]
12120 unsafe fn test_vsubq_u32() {
12121 testq_ari_u32(|i, j| vsubq_u32(i, j), |a: u32, b: u32| -> u32 { a - b });
12122 }
12123
12124 #[simd_test(enable = "neon")]
12125 unsafe fn test_vsub_f32() {
12126 test_ari_f32(|i, j| vsub_f32(i, j), |a: f32, b: f32| -> f32 { a - b });
12127 }
12128 #[simd_test(enable = "neon")]
12129 unsafe fn test_vsubq_f32() {
12130 testq_ari_f32(|i, j| vsubq_f32(i, j), |a: f32, b: f32| -> f32 { a - b });
12131 }
12132
12133 #[simd_test(enable = "neon")]
12134 unsafe fn test_vhsub_s8() {
12135 test_ari_s8(
12136 |i, j| vhsub_s8(i, j),
12137 |a: i8, b: i8| -> i8 { (((a as i16) - (b as i16)) / 2) as i8 },
12138 );
12139 }
12140 #[simd_test(enable = "neon")]
12141 unsafe fn test_vhsubq_s8() {
12142 testq_ari_s8(
12143 |i, j| vhsubq_s8(i, j),
12144 |a: i8, b: i8| -> i8 { (((a as i16) - (b as i16)) / 2) as i8 },
12145 );
12146 }
12147 #[simd_test(enable = "neon")]
12148 unsafe fn test_vhsub_s16() {
12149 test_ari_s16(
12150 |i, j| vhsub_s16(i, j),
12151 |a: i16, b: i16| -> i16 { (((a as i32) - (b as i32)) / 2) as i16 },
12152 );
12153 }
12154 #[simd_test(enable = "neon")]
12155 unsafe fn test_vhsubq_s16() {
12156 testq_ari_s16(
12157 |i, j| vhsubq_s16(i, j),
12158 |a: i16, b: i16| -> i16 { (((a as i32) - (b as i32)) / 2) as i16 },
12159 );
12160 }
12161 #[simd_test(enable = "neon")]
12162 unsafe fn test_vhsub_s32() {
12163 test_ari_s32(
12164 |i, j| vhsub_s32(i, j),
12165 |a: i32, b: i32| -> i32 { (((a as i64) - (b as i64)) / 2) as i32 },
12166 );
12167 }
12168 #[simd_test(enable = "neon")]
12169 unsafe fn test_vhsubq_s32() {
12170 testq_ari_s32(
12171 |i, j| vhsubq_s32(i, j),
12172 |a: i32, b: i32| -> i32 { (((a as i64) - (b as i64)) / 2) as i32 },
12173 );
12174 }
12175
12176 #[simd_test(enable = "neon")]
12177 unsafe fn test_vhsub_u8() {
12178 test_ari_u8(
12179 |i, j| vhsub_u8(i, j),
12180 |a: u8, b: u8| -> u8 { (((a as u16) - (b as u16)) / 2) as u8 },
12181 );
12182 }
12183 #[simd_test(enable = "neon")]
12184 unsafe fn test_vhsubq_u8() {
12185 testq_ari_u8(
12186 |i, j| vhsubq_u8(i, j),
12187 |a: u8, b: u8| -> u8 { (((a as u16) - (b as u16)) / 2) as u8 },
12188 );
12189 }
12190 #[simd_test(enable = "neon")]
12191 unsafe fn test_vhsub_u16() {
12192 test_ari_u16(
12193 |i, j| vhsub_u16(i, j),
12194 |a: u16, b: u16| -> u16 { (((a as u16) - (b as u16)) / 2) as u16 },
12195 );
12196 }
12197 #[simd_test(enable = "neon")]
12198 unsafe fn test_vhsubq_u16() {
12199 testq_ari_u16(
12200 |i, j| vhsubq_u16(i, j),
12201 |a: u16, b: u16| -> u16 { (((a as u16) - (b as u16)) / 2) as u16 },
12202 );
12203 }
12204 #[simd_test(enable = "neon")]
12205 unsafe fn test_vhsub_u32() {
12206 test_ari_u32(
12207 |i, j| vhsub_u32(i, j),
12208 |a: u32, b: u32| -> u32 { (((a as u64) - (b as u64)) / 2) as u32 },
12209 );
12210 }
12211 #[simd_test(enable = "neon")]
12212 unsafe fn test_vhsubq_u32() {
12213 testq_ari_u32(
12214 |i, j| vhsubq_u32(i, j),
12215 |a: u32, b: u32| -> u32 { (((a as u64) - (b as u64)) / 2) as u32 },
12216 );
12217 }
12218
12219 #[simd_test(enable = "neon")]
12220 unsafe fn test_vaba_s8() {
12221 let a = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
12222 let b = i8x8::new(1, 1, 1, 1, 1, 1, 1, 1);
12223 let c = i8x8::new(10, 9, 8, 7, 6, 5, 4, 3);
12224 let r: i8x8 = transmute(vaba_s8(transmute(a), transmute(b), transmute(c)));
12225 let e = i8x8::new(10, 10, 10, 10, 10, 10, 10, 10);
12226 assert_eq!(r, e);
12227 }
12228 #[simd_test(enable = "neon")]
12229 unsafe fn test_vaba_s16() {
12230 let a = i16x4::new(1, 2, 3, 4);
12231 let b = i16x4::new(1, 1, 1, 1);
12232 let c = i16x4::new(10, 9, 8, 7);
12233 let r: i16x4 = transmute(vaba_s16(transmute(a), transmute(b), transmute(c)));
12234 let e = i16x4::new(10, 10, 10, 10);
12235 assert_eq!(r, e);
12236 }
12237 #[simd_test(enable = "neon")]
12238 unsafe fn test_vaba_s32() {
12239 let a = i32x2::new(1, 2);
12240 let b = i32x2::new(1, 1);
12241 let c = i32x2::new(10, 9);
12242 let r: i32x2 = transmute(vaba_s32(transmute(a), transmute(b), transmute(c)));
12243 let e = i32x2::new(10, 10);
12244 assert_eq!(r, e);
12245 }
12246 #[simd_test(enable = "neon")]
12247 unsafe fn test_vaba_u8() {
12248 let a = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
12249 let b = u8x8::new(1, 1, 1, 1, 1, 1, 1, 1);
12250 let c = u8x8::new(10, 9, 8, 7, 6, 5, 4, 3);
12251 let r: u8x8 = transmute(vaba_u8(transmute(a), transmute(b), transmute(c)));
12252 let e = u8x8::new(10, 10, 10, 10, 10, 10, 10, 10);
12253 assert_eq!(r, e);
12254 }
12255 #[simd_test(enable = "neon")]
12256 unsafe fn test_vaba_u16() {
12257 let a = u16x4::new(1, 2, 3, 4);
12258 let b = u16x4::new(1, 1, 1, 1);
12259 let c = u16x4::new(10, 9, 8, 7);
12260 let r: u16x4 = transmute(vaba_u16(transmute(a), transmute(b), transmute(c)));
12261 let e = u16x4::new(10, 10, 10, 10);
12262 assert_eq!(r, e);
12263 }
12264 #[simd_test(enable = "neon")]
12265 unsafe fn test_vaba_u32() {
12266 let a = u32x2::new(1, 2);
12267 let b = u32x2::new(1, 1);
12268 let c = u32x2::new(10, 9);
12269 let r: u32x2 = transmute(vaba_u32(transmute(a), transmute(b), transmute(c)));
12270 let e = u32x2::new(10, 10);
12271 assert_eq!(r, e);
12272 }
12273 #[simd_test(enable = "neon")]
12274 unsafe fn test_vabaq_s8() {
12275 let a = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 8, 7, 6, 5, 4, 3, 2);
12276 let b = i8x16::new(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
12277 let c = i8x16::new(10, 9, 8, 7, 6, 5, 4, 3, 12, 13, 14, 15, 16, 17, 18, 19);
12278 let r: i8x16 = transmute(vabaq_s8(transmute(a), transmute(b), transmute(c)));
12279 let e = i8x16::new(
12280 10, 10, 10, 10, 10, 10, 10, 10, 20, 20, 20, 20, 20, 20, 20, 20,
12281 );
12282 assert_eq!(r, e);
12283 }
12284 #[simd_test(enable = "neon")]
12285 unsafe fn test_vabaq_s16() {
12286 let a = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
12287 let b = i16x8::new(1, 1, 1, 1, 1, 1, 1, 1);
12288 let c = i16x8::new(10, 9, 8, 7, 6, 5, 4, 3);
12289 let r: i16x8 = transmute(vabaq_s16(transmute(a), transmute(b), transmute(c)));
12290 let e = i16x8::new(10, 10, 10, 10, 10, 10, 10, 10);
12291 assert_eq!(r, e);
12292 }
12293 #[simd_test(enable = "neon")]
12294 unsafe fn test_vabaq_s32() {
12295 let a = i32x4::new(1, 2, 3, 4);
12296 let b = i32x4::new(1, 1, 1, 1);
12297 let c = i32x4::new(10, 9, 8, 7);
12298 let r: i32x4 = transmute(vabaq_s32(transmute(a), transmute(b), transmute(c)));
12299 let e = i32x4::new(10, 10, 10, 10);
12300 assert_eq!(r, e);
12301 }
12302 #[simd_test(enable = "neon")]
12303 unsafe fn test_vabaq_u8() {
12304 let a = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 8, 7, 6, 5, 4, 3, 2);
12305 let b = u8x16::new(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
12306 let c = u8x16::new(10, 9, 8, 7, 6, 5, 4, 3, 12, 13, 14, 15, 16, 17, 18, 19);
12307 let r: u8x16 = transmute(vabaq_u8(transmute(a), transmute(b), transmute(c)));
12308 let e = u8x16::new(
12309 10, 10, 10, 10, 10, 10, 10, 10, 20, 20, 20, 20, 20, 20, 20, 20,
12310 );
12311 assert_eq!(r, e);
12312 }
12313 #[simd_test(enable = "neon")]
12314 unsafe fn test_vabaq_u16() {
12315 let a = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
12316 let b = u16x8::new(1, 1, 1, 1, 1, 1, 1, 1);
12317 let c = u16x8::new(10, 9, 8, 7, 6, 5, 4, 3);
12318 let r: u16x8 = transmute(vabaq_u16(transmute(a), transmute(b), transmute(c)));
12319 let e = u16x8::new(10, 10, 10, 10, 10, 10, 10, 10);
12320 assert_eq!(r, e);
12321 }
12322 #[simd_test(enable = "neon")]
12323 unsafe fn test_vabaq_u32() {
12324 let a = u32x4::new(1, 2, 3, 4);
12325 let b = u32x4::new(1, 1, 1, 1);
12326 let c = u32x4::new(10, 9, 8, 7);
12327 let r: u32x4 = transmute(vabaq_u32(transmute(a), transmute(b), transmute(c)));
12328 let e = u32x4::new(10, 10, 10, 10);
12329 assert_eq!(r, e);
12330 }
12331
12332 #[simd_test(enable = "neon")]
12333 unsafe fn test_vrev16_s8() {
12334 let a = i8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
12335 let r = i8x8::new(1, 0, 3, 2, 5, 4, 7, 6);
12336 let e: i8x8 = transmute(vrev16_s8(transmute(a)));
12337 assert_eq!(r, e);
12338 }
12339 #[simd_test(enable = "neon")]
12340 unsafe fn test_vrev16q_s8() {
12341 let a = i8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
12342 let r = i8x16::new(1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14);
12343 let e: i8x16 = transmute(vrev16q_s8(transmute(a)));
12344 assert_eq!(r, e);
12345 }
12346 #[simd_test(enable = "neon")]
12347 unsafe fn test_vrev16_u8() {
12348 let a = u8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
12349 let r = u8x8::new(1, 0, 3, 2, 5, 4, 7, 6);
12350 let e: u8x8 = transmute(vrev16_u8(transmute(a)));
12351 assert_eq!(r, e);
12352 }
12353 #[simd_test(enable = "neon")]
12354 unsafe fn test_vrev16q_u8() {
12355 let a = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
12356 let r = u8x16::new(1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14);
12357 let e: u8x16 = transmute(vrev16q_u8(transmute(a)));
12358 assert_eq!(r, e);
12359 }
12360 #[simd_test(enable = "neon")]
12361 unsafe fn test_vrev16_p8() {
12362 let a = i8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
12363 let r = i8x8::new(1, 0, 3, 2, 5, 4, 7, 6);
12364 let e: i8x8 = transmute(vrev16_p8(transmute(a)));
12365 assert_eq!(r, e);
12366 }
12367 #[simd_test(enable = "neon")]
12368 unsafe fn test_vrev16q_p8() {
12369 let a = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
12370 let r = u8x16::new(1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14);
12371 let e: u8x16 = transmute(vrev16q_p8(transmute(a)));
12372 assert_eq!(r, e);
12373 }
12374 #[simd_test(enable = "neon")]
12375 unsafe fn test_vrev32_s8() {
12376 let a = i8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
12377 let r = i8x8::new(3, 2, 1, 0, 7, 6, 5, 4);
12378 let e: i8x8 = transmute(vrev32_s8(transmute(a)));
12379 assert_eq!(r, e);
12380 }
12381 #[simd_test(enable = "neon")]
12382 unsafe fn test_vrev32q_s8() {
12383 let a = i8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
12384 let r = i8x16::new(3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12);
12385 let e: i8x16 = transmute(vrev32q_s8(transmute(a)));
12386 assert_eq!(r, e);
12387 }
12388 #[simd_test(enable = "neon")]
12389 unsafe fn test_vrev32_u8() {
12390 let a = u8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
12391 let r = u8x8::new(3, 2, 1, 0, 7, 6, 5, 4);
12392 let e: u8x8 = transmute(vrev32_u8(transmute(a)));
12393 assert_eq!(r, e);
12394 }
12395 #[simd_test(enable = "neon")]
12396 unsafe fn test_vrev32q_u8() {
12397 let a = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
12398 let r = u8x16::new(3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12);
12399 let e: u8x16 = transmute(vrev32q_u8(transmute(a)));
12400 assert_eq!(r, e);
12401 }
12402 #[simd_test(enable = "neon")]
12403 unsafe fn test_vrev32_s16() {
12404 let a = i16x4::new(0, 1, 2, 3);
12405 let r = i16x4::new(1, 0, 3, 2);
12406 let e: i16x4 = transmute(vrev32_s16(transmute(a)));
12407 assert_eq!(r, e);
12408 }
12409 #[simd_test(enable = "neon")]
12410 unsafe fn test_vrev32q_s16() {
12411 let a = i16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
12412 let r = i16x8::new(1, 0, 3, 2, 5, 4, 7, 6);
12413 let e: i16x8 = transmute(vrev32q_s16(transmute(a)));
12414 assert_eq!(r, e);
12415 }
12416 #[simd_test(enable = "neon")]
12417 unsafe fn test_vrev32_p16() {
12418 let a = i16x4::new(0, 1, 2, 3);
12419 let r = i16x4::new(1, 0, 3, 2);
12420 let e: i16x4 = transmute(vrev32_p16(transmute(a)));
12421 assert_eq!(r, e);
12422 }
12423 #[simd_test(enable = "neon")]
12424 unsafe fn test_vrev32q_p16() {
12425 let a = i16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
12426 let r = i16x8::new(1, 0, 3, 2, 5, 4, 7, 6);
12427 let e: i16x8 = transmute(vrev32q_p16(transmute(a)));
12428 assert_eq!(r, e);
12429 }
12430 #[simd_test(enable = "neon")]
12431 unsafe fn test_vrev32_u16() {
12432 let a = u16x4::new(0, 1, 2, 3);
12433 let r = u16x4::new(1, 0, 3, 2);
12434 let e: u16x4 = transmute(vrev32_u16(transmute(a)));
12435 assert_eq!(r, e);
12436 }
12437 #[simd_test(enable = "neon")]
12438 unsafe fn test_vrev32q_u16() {
12439 let a = u16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
12440 let r = u16x8::new(1, 0, 3, 2, 5, 4, 7, 6);
12441 let e: u16x8 = transmute(vrev32q_u16(transmute(a)));
12442 assert_eq!(r, e);
12443 }
12444 #[simd_test(enable = "neon")]
12445 unsafe fn test_vrev32_p8() {
12446 let a = u8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
12447 let r = u8x8::new(3, 2, 1, 0, 7, 6, 5, 4);
12448 let e: u8x8 = transmute(vrev32_p8(transmute(a)));
12449 assert_eq!(r, e);
12450 }
12451 #[simd_test(enable = "neon")]
12452 unsafe fn test_vrev32q_p8() {
12453 let a = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
12454 let r = u8x16::new(3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12);
12455 let e: u8x16 = transmute(vrev32q_p8(transmute(a)));
12456 assert_eq!(r, e);
12457 }
12458 #[simd_test(enable = "neon")]
12459 unsafe fn test_vrev64_s8() {
12460 let a = i8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
12461 let r = i8x8::new(7, 6, 5, 4, 3, 2, 1, 0);
12462 let e: i8x8 = transmute(vrev64_s8(transmute(a)));
12463 assert_eq!(r, e);
12464 }
12465 #[simd_test(enable = "neon")]
12466 unsafe fn test_vrev64q_s8() {
12467 let a = i8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
12468 let r = i8x16::new(7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8);
12469 let e: i8x16 = transmute(vrev64q_s8(transmute(a)));
12470 assert_eq!(r, e);
12471 }
12472 #[simd_test(enable = "neon")]
12473 unsafe fn test_vrev64_s16() {
12474 let a = i16x4::new(0, 1, 2, 3);
12475 let r = i16x4::new(3, 2, 1, 0);
12476 let e: i16x4 = transmute(vrev64_s16(transmute(a)));
12477 assert_eq!(r, e);
12478 }
12479 #[simd_test(enable = "neon")]
12480 unsafe fn test_vrev64q_s16() {
12481 let a = i16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
12482 let r = i16x8::new(3, 2, 1, 0, 7, 6, 5, 4);
12483 let e: i16x8 = transmute(vrev64q_s16(transmute(a)));
12484 assert_eq!(r, e);
12485 }
12486 #[simd_test(enable = "neon")]
12487 unsafe fn test_vrev64_s32() {
12488 let a = i32x2::new(0, 1);
12489 let r = i32x2::new(1, 0);
12490 let e: i32x2 = transmute(vrev64_s32(transmute(a)));
12491 assert_eq!(r, e);
12492 }
12493 #[simd_test(enable = "neon")]
12494 unsafe fn test_vrev64q_s32() {
12495 let a = i32x4::new(0, 1, 2, 3);
12496 let r = i32x4::new(1, 0, 3, 2);
12497 let e: i32x4 = transmute(vrev64q_s32(transmute(a)));
12498 assert_eq!(r, e);
12499 }
12500 #[simd_test(enable = "neon")]
12501 unsafe fn test_vrev64_u8() {
12502 let a = u8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
12503 let r = u8x8::new(7, 6, 5, 4, 3, 2, 1, 0);
12504 let e: u8x8 = transmute(vrev64_u8(transmute(a)));
12505 assert_eq!(r, e);
12506 }
12507 #[simd_test(enable = "neon")]
12508 unsafe fn test_vrev64q_u8() {
12509 let a = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
12510 let r = u8x16::new(7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8);
12511 let e: u8x16 = transmute(vrev64q_u8(transmute(a)));
12512 assert_eq!(r, e);
12513 }
12514 #[simd_test(enable = "neon")]
12515 unsafe fn test_vrev64_u16() {
12516 let a = u16x4::new(0, 1, 2, 3);
12517 let r = u16x4::new(3, 2, 1, 0);
12518 let e: u16x4 = transmute(vrev64_u16(transmute(a)));
12519 assert_eq!(r, e);
12520 }
12521 #[simd_test(enable = "neon")]
12522 unsafe fn test_vrev64q_u16() {
12523 let a = u16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
12524 let r = u16x8::new(3, 2, 1, 0, 7, 6, 5, 4);
12525 let e: u16x8 = transmute(vrev64q_u16(transmute(a)));
12526 assert_eq!(r, e);
12527 }
12528 #[simd_test(enable = "neon")]
12529 unsafe fn test_vrev64_u32() {
12530 let a = u32x2::new(0, 1);
12531 let r = u32x2::new(1, 0);
12532 let e: u32x2 = transmute(vrev64_u32(transmute(a)));
12533 assert_eq!(r, e);
12534 }
12535 #[simd_test(enable = "neon")]
12536 unsafe fn test_vrev64q_u32() {
12537 let a = u32x4::new(0, 1, 2, 3);
12538 let r = u32x4::new(1, 0, 3, 2);
12539 let e: u32x4 = transmute(vrev64q_u32(transmute(a)));
12540 assert_eq!(r, e);
12541 }
12542 #[simd_test(enable = "neon")]
12543 unsafe fn test_vrev64_f32() {
12544 let a = f32x2::new(1.0, 2.0);
12545 let r = f32x2::new(2.0, 1.0);
12546 let e: f32x2 = transmute(vrev64_f32(transmute(a)));
12547 assert_eq!(r, e);
12548 }
12549 #[simd_test(enable = "neon")]
12550 unsafe fn test_vrev64q_f32() {
12551 let a = f32x4::new(1.0, 2.0, -2.0, -1.0);
12552 let r = f32x4::new(2.0, 1.0, -1.0, -2.0);
12553 let e: f32x4 = transmute(vrev64q_f32(transmute(a)));
12554 assert_eq!(r, e);
12555 }
12556 #[simd_test(enable = "neon")]
12557 unsafe fn test_vrev64_p8() {
12558 let a = u8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
12559 let r = u8x8::new(7, 6, 5, 4, 3, 2, 1, 0);
12560 let e: u8x8 = transmute(vrev64_p8(transmute(a)));
12561 assert_eq!(r, e);
12562 }
12563 #[simd_test(enable = "neon")]
12564 unsafe fn test_vrev64q_p8() {
12565 let a = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
12566 let r = u8x16::new(7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8);
12567 let e: u8x16 = transmute(vrev64q_p8(transmute(a)));
12568 assert_eq!(r, e);
12569 }
12570 #[simd_test(enable = "neon")]
12571 unsafe fn test_vrev64_p16() {
12572 let a = u16x4::new(0, 1, 2, 3);
12573 let r = u16x4::new(3, 2, 1, 0);
12574 let e: u16x4 = transmute(vrev64_p16(transmute(a)));
12575 assert_eq!(r, e);
12576 }
12577 #[simd_test(enable = "neon")]
12578 unsafe fn test_vrev64q_p16() {
12579 let a = u16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
12580 let r = u16x8::new(3, 2, 1, 0, 7, 6, 5, 4);
12581 let e: u16x8 = transmute(vrev64q_p16(transmute(a)));
12582 assert_eq!(r, e);
12583 }
12584
12585 macro_rules! test_vcombine {
12586 ($test_id:ident => $fn_id:ident ([$($a:expr),*], [$($b:expr),*])) => {
12587 #[allow(unused_assignments)]
12588 #[simd_test(enable = "neon")]
12589 unsafe fn $test_id() {
12590 let a = [$($a),*];
12591 let b = [$($b),*];
12592 let e = [$($a),* $(, $b)*];
12593 let c = $fn_id(transmute(a), transmute(b));
12594 let mut d = e;
12595 d = transmute(c);
12596 assert_eq!(d, e);
12597 }
12598 }
12599 }
12600
12601 test_vcombine!(test_vcombine_s8 => vcombine_s8([3_i8, -4, 5, -6, 7, 8, 9, 10], [13_i8, -14, 15, -16, 17, 18, 19, 110]));
12602 test_vcombine!(test_vcombine_u8 => vcombine_u8([3_u8, 4, 5, 6, 7, 8, 9, 10], [13_u8, 14, 15, 16, 17, 18, 19, 110]));
12603 test_vcombine!(test_vcombine_p8 => vcombine_p8([3_u8, 4, 5, 6, 7, 8, 9, 10], [13_u8, 14, 15, 16, 17, 18, 19, 110]));
12604
12605 test_vcombine!(test_vcombine_s16 => vcombine_s16([3_i16, -4, 5, -6], [13_i16, -14, 15, -16]));
12606 test_vcombine!(test_vcombine_u16 => vcombine_u16([3_u16, 4, 5, 6], [13_u16, 14, 15, 16]));
12607 test_vcombine!(test_vcombine_p16 => vcombine_p16([3_u16, 4, 5, 6], [13_u16, 14, 15, 16]));
12608 test_vcombine!(test_vcombine_s32 => vcombine_s32([3_i32, -4], [13_i32, -14]));
12613 test_vcombine!(test_vcombine_u32 => vcombine_u32([3_u32, 4], [13_u32, 14]));
12614 test_vcombine!(test_vcombine_f32 => vcombine_f32([3_f32, -4.], [13_f32, -14.]));
12616
12617 test_vcombine!(test_vcombine_s64 => vcombine_s64([-3_i64], [13_i64]));
12618 test_vcombine!(test_vcombine_u64 => vcombine_u64([3_u64], [13_u64]));
12619 test_vcombine!(test_vcombine_p64 => vcombine_p64([3_u64], [13_u64]));
12620 #[cfg(any(target_arch = "aarch64", target_arch = "arm64ec"))]
12621 test_vcombine!(test_vcombine_f64 => vcombine_f64([-3_f64], [13_f64]));
12622}
12623
12624#[cfg(all(test, target_arch = "arm"))]
12625mod table_lookup_tests;
12626
12627#[cfg(all(test, target_arch = "arm"))]
12628mod shift_and_insert_tests;
12629
12630#[cfg(all(test, target_arch = "arm"))]
12631mod load_tests;
12632
12633#[cfg(all(test, target_arch = "arm"))]
12634mod store_tests;