PIC16F527 |
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CONFIG (address:0x07FF, mask:0x03FF) |
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FOSC -- Oscillator Selection |
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FOSC = LP |
0x0FF8 |
LP oscillator and automatic 18 ms DRT (DRTEN ignored). |
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FOSC = XT |
0x0FF9 |
XT oscillator and automatic 18 ms DRT (DRTEN ignored). |
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FOSC = HS |
0x0FFA |
HS oscillator and automatic 18 ms DRT (DRTEN ignored). |
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FOSC = EC |
0x0FFB |
EC oscillator with I/O function on OSC2/CLKOUT and 10 us startup time. |
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FOSC = INTRC_IO |
0x0FFC |
INTRC with I/O function on OSC2/CLKOUT and 10 us startup time. |
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FOSC = INTRC_CLKOUT |
0x0FFD |
INTRC with CLKOUT function on OSC2/CLKOUT and 10 us startup time. |
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FOSC = EXTRC_IO |
0x0FFE |
EXTRC with I/O function on OSC2/CLKOUT and 10 us startup time. |
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FOSC = EXTRC_CLKOUT |
0x0FFF |
EXTRC with CLKOUT function on OSC2/CLKOUT and 10 us startup time. |
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WDTE -- Watchdog Timer Enable |
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WDTE = OFF |
0x0FF7 |
WDT Disabled. |
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WDTE = ON |
0x0FFF |
WDT Enabled. |
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CP -- Code Protection - User Program Memory |
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CP = ON |
0x0FEF |
Code protection on. |
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CP = OFF |
0x0FFF |
Code protection off. |
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MCLRE -- Master Clear Enable |
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MCLRE = OFF |
0x0FDF |
MCLR pin functions as I/O, MCLR internally tied to Vdd. |
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MCLRE = ON |
0x0FFF |
MCLR pin functions as MCLR. |
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IOSCFS -- Internal Oscillator Frequency Select |
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IOSCFS = 4MHz |
0x0FBF |
4 MHz INTOSC Speed. |
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IOSCFS = 8MHz |
0x0FFF |
8 MHz INTOSC Speed. |
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CPSW -- Code Protection - Self Writable Memory |
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CPSW = ON |
0x0F7F |
Code protection on. |
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CPSW = OFF |
0x0FFF |
Code protection off. |
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BOREN -- Brown-out Reset Enable |
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BOREN = OFF |
0x0EFF |
BOR Disabled. |
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BOREN = ON |
0x0FFF |
BOR Enabled. |
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DRTEN -- Device Reset Timer Enable |
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DRTEN = OFF |
0x0DFF |
DRT Disabled. |
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DRTEN = ON |
0x0FFF |
DRT Enabled (18 ms). |
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