PIC12F519
CONFIG (address:0x0FFF, mask:0xFFFF)
FOSC -- Oscillator Selection bits
FOSC = LP 0x0FFC LP Osc With 18 ms DRT.
FOSC = XT 0x0FFD XT Osc With 18 ms DRT.
FOSC = INTRC 0x0FFE INTRC With 1 ms DRT.
FOSC = EXTRC 0x0FFF EXTRC With 1 ms DRT.
WDTE -- Watchdog Timer Enable bit
WDTE = OFF 0x0FFB Disabled.
WDTE = ON 0x0FFF Enabled.
CP -- Code Protection bit
CP = ON 0x0FF7 Code protection on.
CP = OFF 0x0FFF Code protection off.
MCLRE -- Master Clear Enable bit
MCLRE = OFF 0x0FEF RB3/MCLR Functions as RB3.
MCLRE = ON 0x0FFF RB3/MCLR Functions as MCLR.
IOSCFS -- Internal Oscillator Frequency Select bit
IOSCFS = 4MHz 0x0FDF 4 MHz INTOSC Speed.
IOSCFS = 8MHz 0x0FFF 8 MHz INTOSC Speed.
CPDF -- Code Protection bit - Flash Data Memory
CPDF = ON 0x0FBF Code protection on.
CPDF = OFF 0x0FFF Code protection off.

This page generated automatically by the device-help.pl program (2012-11-26 09:25:59 UTC) from the 8bit_device.info file (rev: 1.10) of mpasmx and from the gputils source package (rev: svn 834). The mpasmx is included in the MPLAB X. The device-help.pl is included in the gputils source package.